COP8FG Datasheet, PDF (21/59 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART

6.0 Timers (Continued)
6.3 TIMER CONTROL FLAGS
The control bits and their functions are summarized below.
TxC3 Timer mode control
TxC2 Timer mode control
TxC1 Timer mode control
TxC0
Timer Start/Stop control in Modes 1 and 2 (Pro-
cessor Independent PWM and External Event
Counter), where 1 = Start, 0 = Stop
Timer Underflow Interrupt Pending Flag in
Mode 3 (Input Capture)
TxPNDA Timer Interrupt Pending Flag
TxENA Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
TxPNDB Timer Interrupt Pending Flag
TxENB Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
The timer mode control bits (TxC3, TxC2 and TxC1) are detailed below:
Mode
1
2
3
TxC3
1
1
0
0
0
1
0
1
TxC2
0
0
0
0
1
1
1
1
TxC1
1
0
0
1
0
0
1
1
Description
PWM: TxA Toggle
PWM: No TxA
Toggle
External Event
Counter
External Event
Counter
Captures:
TxA Pos. Edge
TxB Pos. Edge
Captures:
TxA Pos. Edge
TxB Neg. Edge
Captures:
TxA Neg. Edge
TxB Neg. Edge
Captures:
TxA Neg. Edge
TxB Neg. Edge
Interrupt A
Source
Autoreload RA
Autoreload RA
Interrupt B
Source
Autoreload RB
Autoreload RB
Timer
Underflow
Timer
Underflow
Pos. TxA Edge
or Timer
Underflow
Pos. TxA
Edge or Timer
Underflow
Neg. TxA
Edge or Timer
Underflow
Neg. TxA
Edge or Timer
Underflow
Pos. TxB Edge
Pos. TxB Edge
Pos. TxB Edge
Neg. TxB
Edge
Neg. TxB
Edge
Neg. TxB
Edge
Timer
Counts On
t_C
t_C
Pos. TxA
Edge
Pos. TxA
Edge
t_C
t_C
t_C
t_C
21
www.national.com