LM1237_04 Datasheet, PDF (20/42 Pages) National Semiconductor (TI) – 150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs

Microcontroller Interface (Continued)
FIGURE 19. I²C Compatible Write Sequence
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READ SEQUENCE
Read sequences are comprised of two I²C compatible trans-
fer sequences: The first is a write sequence that only trans-
fers the two byte address to be accessed. The second is a
read sequence that starts at the address transferred in the
previous address only write access and increments to the
next address upon every data byte read. This is shown in
Figure 20. The write sequence consists of the Start Pulse,
the Slave Device Address, the Read/Write bit (a zero, indi-
cating a write) and the Acknowledge bit; the next byte is the
least significant byte of the address to be accessed, followed
by its Acknowledge bit. This is then followed by a byte
containing the most significant address byte, followed by its
Acknowledge bit. Then a Stop bit indicates the end of the
address only write access. Next the read data access will be
performed beginning with the Start Pulse, the Slave Device
Address, the Read/Write bit ( a one, indicating a read) and
the Acknowledge bit. The next 8 bits will be the read data
driven out by the LM1237 preamp associated with the ad-
dress indicated by the two address bytes. Subsequent read
data bytes will correspond to the next increment address
locations. Data should only be read from the LM1237 when
both OSD windows are disabled.
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FIGURE 20. I²C Compatible Read Sequence
20
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