THS4503-EP Datasheet, PDF (2/40 Pages) Texas Instruments – WIDEBAND, LOW-DISTORTION FULLY DIFFERENTIAL AMPLIFIERS

THS4503−EP
SGLS291A − APRIL 2005 − JANUARY 2012
APPLICATION CIRCUIT DIAGRAM
10 pF
50 Ω
374 Ω
V_S
56.2 Ω
1 μF
402 Ω
392 Ω
5V
5V
0.1 μF 10 μF
24.9 Ω
+_−
IN _ADC
V_OCM
THS4503
14 Bit/80 MSps
−⁺
IN V_ref
24.9 Ω
−5 V 0.1 μF 10 μF
392 Ω
10 pF
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THIRD-ORDER INTERMODULATION
DISTORTION
−62
10
392 Ω
−68
VS
50 Ω 374 Ω
2.5 V
56.2 Ω
5V
+_−
VOCM
−⁺
VOUT
800 Ω
−74
402 Ω −5 V
12
392 Ω
−80
−86
−92
−98
0
14
20
40
60
80
f − Frequency − MHz
16
100
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted⁽¹⁾
UNIT
Supply voltage, V_S
16.5 V
Input voltage, V_I
Output current, I_O ⁽²⁾
±V_S
150 mA
Differential input voltage, V_ID
4V
Continuous power dissipation
See Dissipation Rating Table
Maximum junction temperature, T_J ⁽³⁾
150°C
Maximum junction temperature, continuous
operation, long term reliability T_J ⁽⁴⁾
125°C
Maximum junction temperature, to prevent
oscillation T_J ⁽⁵⁾
60°C
Operating free-air temperature range, T_A
−55°C to 60°C
Storage temperature range, T_stg
−65°C to 150°C
Lead temperature
1,6 mm (1/16 inch) from case for 10 seconds
300°C
HBM
4000 V
ESD ratings:
CDM
2000 V
MM
100 V
(1) _{Stresses above these ratings may cause permanent damage.}
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2) _{The THS450x may incorporate a PowerPAD on the underside of}
the chip. This acts as a heatsink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure
to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See
Texas Instruments technical brief SLMA002 for more information
about utilizing the PowerPAD thermally enhanced package.
(3) _{The absolute maximum temperature under any condition is}
limited by the constraints of the silicon process.
(4) _{Long-term high-temperature storage and/or extended use at}
maximum recommended operating conditions may result in a
reduction of overall device life. See Figure 1 for additional
information on thermal derating.
(5) _{See Maximum Die Temperature to Prevent Oscillation section in}
the Application Information of this data sheet.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE DISSIPATION RATINGS
PACKAGE
θ_JC
θ_JA(1)
(°C/W) (°C/W)
DGN (8 pin)
4.7
58.4
(1) _{This data was taken using the JEDEC standard High-K test PCB.}
RECOMMENDED OPERATING CONDITIONS
Supply voltage
Dual supply
Single supply
Operating free-air temperature, TA
MIN NOM MAX UNIT
±5 ±7.5
V
4.5
5 15
−55
60 °C
2