THS4281 Datasheet, PDF (2/37 Pages) Texas Instruments – VERY LOW-POWER, HIGH-SPEED, RAIL-TO-RAIL INPUT AND OUTPUT VOLTAGE-FEEDBACK OPERATIONAL AMPLIFIER

THS4281
SLOS432A – APRIL 2004 – REVISED NOVEMBER 2009
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Over operating free-air temperature range (unless otherwise noted).
Supply voltage, V_S– to V_S+
Input voltage, V_I
Differential input voltage, V_ID
Output current, I_O
Continuous power dissipation
Maximum junction temperature, any condition, ⁽²⁾ T_J
Maximum junction temperature, continuous operation, long-term reliability⁽²⁾ T_J
Storage temperature range, T_stg
HBM
ESD ratings CDM
MM
UNIT
16.5 V
±V_S ± 0.5 V
±2 V
±100 mA
See Dissipation Ratings Table
+150°C
+125°C
–65°C to +150°C
3500 V
1500 V
100 V
(1) The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may
cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device. recommended operating conditions.
RECOMMENDED OPERATING CONDITIONS
Supply voltage, (V_S+ and V_{S –})
Dual supply
Single supply
MIN
±1.35
2.7
MAX
±8.25
16.5
UNIT
V
DISSIPATION RATINGS TABLE PER PACKAGE
PACKAGE
θ_JC
(°C/W)
θ_JA ⁽¹⁾
(°C/W)
DBV (5)
D (8)
DGK (8)
55
255.4
38.3
97.5
71.5
180.8
POWER RATING⁽²⁾
T_A < +25°C
391 mW
T_A = +85°C
156 mW
1.02 W
410 mW
553 mW
221 mW
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of +125°C. This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the junction temperature at or below +125°C for best performance and long
term reliability.
2
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