PGA870 Datasheet, PDF (2/39 Pages) Texas Instruments – High-Speed, Fully Differential, Programmable-Gain Amplifier

PGA870
SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PRODUCT
PGA870
PACKAGE-LEAD
QFN-28
ORDERING INFORMATION⁽¹⁾
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
RHD
–40°C to +85°C
PGA870
PGA870
ORDERING
NUMBER
PGA870IRHDT
PGA870IRHDR
TRANSPORT MEDIA,
QUANTITY
Tape and Reel, 250
Tape and Reel, 3000
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Over operating free-air temperature range, unless otherwise noted.
Power supply
Internal power dissipation
Input voltage range
Storage temperature range
Maximum junction temperature (T_J)
Maximum junction temperature (T_J), continuous operation, long-term reliability
Human body model (HBM)
ESD rating
Charged device model (CDM)
Machine model (MM)
PGA870
6
See Thermal Characteristics
V_S
–65 to +150
+150
+140
2000
1000
200
UNIT
V
V
°C
°C
°C
V
V
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
DISSIPATION RATINGS⁽¹⁾
PACKAGE
QFN-28
θ_JP(°C/W)
4.1
θ_JA(°C/W)
35
POWER RATING⁽²⁾
(T_J= +125°C)
T_A= +25°C
T_A= +85°C
2.9 W
0.87 W
(1) These data were taken with the JEDEC High-K test PCB. For the JEDEC low-K test PCB, θ_JA is 350°C/W.
(2) Power rating is determined with a junction temperature of +125°C. This is the point where distortion starts to substantially increase and
long-term reliability starts to be reduced. Thermal management of the final printed circuit board should strive to keep the junction
temperature at or below +125° C for best performance and reliability.
2
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