LP3878-ADJ Datasheet, PDF (2/13 Pages) National Semiconductor (TI) – Micropower 800mA Low Noise(Ceramic Stable) Adjustable Voltage Regulator for 1V to 5V Applications

Connection Diagrams
8 Lead PSOP Package (MRA)
8 Lead LLP Surface Mount Package (SD)
20120930
Top View
See NS Package Number MRA08A
20120950
Top View
See NS Package Number SDC08A
Ordering Information
TABLE 1. Package Marking and Ordering Information
Output Voltage
ADJ
ADJ
ADJ
ADJ
Grade
STD
STD
STD
STD
Order Information
LP3878MR-ADJ
LP3878MRX-ADJ
LP3878SD-ADJ
LP3878SDX-ADJ
Supplied as:
95 Units per Rail
2500 Units on Tape and Reel
1000 Units on Tape and Reel
4500 Units on Tape and Reel
Pin Description
PIN
1
2
3
4
5
6
7
8
PSOP, LLP
DAP
NAME
BYPASS
N/C
GROUND
INPUT
OUTPUT
ADJ
N/C
SHUTDOWN
SUBSTRATE
GROUND
FUNCTION
The capacitor connected between BYPASS and GROUND lowers
output noise voltage level and is required for loop stability.
DO NOT CONNECT. This pin is used for post package test and must
be left floating.
Device ground.
Input source voltage.
Regulated output voltage.
Provides feedback to error amplifier from the resistive divider that sets
the output voltage.
No internal connection.
Output is enabled above turn-on threshold voltage. Pull down to turn off
regulator output.
The exposed die attach pad should be connected to a thermal pad at
ground potential. For additional information on using National
Semiconductor’s Non Pull Back LLP package, please refer to LLP
application note AN-1187
www.national.com
2