LMX2350 Datasheet, PDF (2/21 Pages) National Semiconductor (TI) – PLLatinum TM Fractional N RF / Integer N IF Dual Low Power Frequency Synthesizer

Connection Diagrams
DS100831-2
Order Number LMX2350TM or LMX2352TM
NS Package Number MTC24
Pin Descriptions
DS100831-22
Pin No.
for CSP
Package
24
1
Pin No.
for
TSSOP
package
1
2
Pin Name
OUT0
Vcc_RF
2
3
V_pRF
3
4
CP_oRF
4
5
GND
5
6
fin RF
6
7
fin RF
7
8
GND
8
9
OSCx
I/O Description
O Programmable CMOS output. Level of the output is controlled by IF_N [17] bit.
- RF PLL power supply voltage input. Must be equal to Vcc_IF. May range from 2.7 V to
5.5 V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
- Power supply for RF charge pump. Must be ≥V_ccRF and V_ccIF.
O RF charge pump output. Connected to a loop filter for driving the control input of an
external VCO.
- Ground for RF PLL digital circuitry.
I RF prescaler input. Small signal input from the VCO.
I RF prescaler complimentary input. A bypass capacitor should be placed as close as
possible to this pin and be connected directly to the ground plane.
- Ground for RF PLL analog circuitry.
I/O Dual mode oscillator output or RF R counter input. Has a Vcc/2 input threshold when
configured as an input and can be driven from an external CMOS or TTL logic gate.
Can also be configured as an output to work in conjunction with OSCin to form a
crystal oscillator. (See functional description 1.1 and programming description 3.1.)
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