LMC6062_14 Datasheet, PDF (2/21 Pages) National Semiconductor (TI) – LMC6062 Precision CMOS Dual Micropower Operational Amplifier

LMC6062
SNOS631D – NOVEMBER 1994 – REVISED MARCH 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Absolute Maximum Ratings ⁽¹⁾⁽²⁾
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V⁺ − V^−)
Output Short Circuit to V⁺
Output Short Circuit to V^−
Lead Temperature (Soldering, 10 sec.)
Storage Temp. Range
Junction Temperature
ESD Tolerance ⁽⁵⁾
Current at Input Pin
Current at Output Pin
Current at Power Supply Pin
Power Dissipation
±Supply Voltage
(V⁺) +0.3V,
(V^−) −0.3V
16V
See ⁽³⁾
See ⁽⁴⁾
260°C
−65°C to +150°C
150°C
2 kV
±10 mA
±30 mA
40 mA
See ⁽⁶⁾
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications
(3) Do not connect output to V⁺, when V⁺ is greater than 13V or reliability witll be adversely affected.
(4) Applies to both single-supply and split-supply operation. Continuos short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(5) Human body model, 1.5 kΩ in series with 100 pF.
(6) The maximum power dissipation is a function of T_J(Max), θ_JA, and T_A. The maximum allowable power dissipation at any ambient
temperature is P_D = (T_J(Max) − T_A)/θ_JA.
Operating Ratings ⁽¹⁾
Temperature Range
Supply Voltage
Thermal Resistance (θ_JA) ⁽²⁾
Power Dissipation
LMC6062AM
LMC6062AI, LMC6082I
8-Pin PDIP
8-Pin SOIC
−55°C ≤ T_J ≤ +125°C
−40°C ≤ T_J ≤ +85°C
4.5V ≤ V⁺ ≤ 15.5V
115°C/W
193°C/W
See ⁽³⁾
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) All numbers apply for packages soldered directly into a PC board.
(3) For operating at elevated temperatures the device must be derated based on the thermal resistance θ_JA with P_D = (T_J–T_A)/θ_JA.
DC Electrical Characteristics⁽¹⁾
Unless otherwise specified, all limits ensured for T_J = 25°C. Boldface limits apply at the temperature extremes. V⁺ = 5V, V^− =
0V, V_CM = 1.5V, V_O = 2.5V and R_L > 1M unless otherwise specified.
Symbol
Parameter
Conditions
Typ ⁽²⁾
LMC6062AM LMC6062AI LMC6062I
Limit ⁽³⁾
Limit ⁽³⁾
Limit ⁽³⁾
Units
V_OS
Input Offset Voltage
100
350
1200
350
800
μV
900
1300
Max
(1) For ensured Military Temperature Range parameters, see RETSMC6062X.
(2) Typical values represent the most likely parametric norm.
(3) All limits are ensured by testing or statistical analysis.
2
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