DS90C401 Datasheet, PDF (2/11 Pages) National Semiconductor (TI) – Dual Low Voltage Differential Signaling (LVDS) Driver

Absolute Maximum Ratings (Note 1)
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Supply Voltage (V_CC)
Input Voltage (D_IN)
Output Voltage (D_OUT+, D_OUT−)
Short Circuit Duration
−0.3V to +6V
−0.3V to (V_CC + 0.3V)
−0.3V to (V_CC + 0.3V)
(D_OUT+, D_OUT−)
Continuous
Maximum Package Power Dissipation @ +25˚C
M Package
1068 mW
Derate M Package
8.5 mW/˚C above +25˚C
Storage Temperature Range
−65˚C to +150˚C
Lead Temperature Range
Soldering (4 sec.)
+260˚C
Maximum Junction
Temperature
ESD Rating
(HBM, 1.5 kΩ, 100 pF)
(EIAJ, 0 Ω, 200 pF)
+150˚C
≥ 3,500V
≥ 250V
Recommended Operating
Conditions
Supply Voltage (V_CC)
Operating Free Air
Temperature (T_A)
Min Typ Max Units
+4.5 +5.0 +5.5 V
−40 +25 +85 ˚C
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 3)
Symbol
Parameter
Conditions
Pin
Min
V_OD1
∆V_OD1
Differential Output Voltage
Change in Magnitude of V_OD1 for
Complementary Output States
R_L = 100Ω (Figure 1)
D_OUT−,
D_OUT+
250
V_OS
∆V_OS
Offset Voltage
Change in Magnitude of V_OS for
Complementary Output States
1.125
V_OH
Output Voltage High
R_L = 100Ω
V_OL
Output Voltage Low
0.90
I_OS
Output Short Circuit Current
V_OUT = 0V (Note 8)
V_IH
Input Voltage High
D_IN
2.0
V_IL
Input Voltage Low
GND
I_I
Input Current
V_IN = V_CC, GND, 2.5V or 0.4V
−10
V_CL
Input Clamp Voltage
I_CL = −18 mA
−1.5
I_CC
No Load Supply Current
D_IN = V_CC or GND
V_CC
D_IN = 2.5V or 0.4V
I_CCL
Loaded Supply Current
R_L = 100Ω All Channels
V_IN = V_CC or GND (all inputs)
Typ
340
4
1.25
5
1.41
1.07
−3.5
±1
−0.8
1.7
3.5
8
Max
450
35
1.375
25
1.60
−5.0
V_CC
0.8
+10
3.0
5.5
14.0
Units
mV
|mV|
V
|mV|
V
V
mA
V
V
µA
V
mA
mA
mA
Switching Characteristics
V_CC = +5.0V ±10%, T_A = −40˚C to +85˚C (Notes 3, 4, 5, 6, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t_PHLD
Differential Propagation Delay High to Low
R_L = 100Ω, C_L = 5 pF
0.5
2.0
3.5
ns
t_PLHD
Differential Propagation Delay Low to High
(Figure 2 and Figure 3)
0.5
2.1
3.5
ns
t_SKD
Differential Skew |t_PHLD – t_PLHD|
0
80
900
ps
t_SK1
Channel-to-Channel Skew (Note 4)
t_SK2
Chip to Chip Skew (Note 5)
t_TLH
Rise Time
t_THL
Fall Time
0
0.3
1.0
ns
3.0
ns
0.35
2.0
ns
0.35
2.0
ns
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