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| DS8906 Datasheet, PDF (2/8 Pages) National Semiconductor (TI) – AM/FM Digital Phase-Locked Loop Synthesizer | |||
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Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
(VCC1)
7V
(VCCM)
7V
Input Voltage
7V
Output Voltage
7V
DC Electrical Characteristics (Notes 2 and 3)
Storage Temperature Range
b65 C to a150 C
Lead Temperature (Soldering 4 seconds)
260 C
Operating Conditions
Min
Max
Supply Voltage VCC
VCC1
VCCM
4 75
45
5 25
60
Temperature TA
0
70
Units
V
V
C
Symbol
Parameter
Conditions
VIH
Logical ââ1ââ Input Voltage
IIH
Logical ââ1ââ Input Current
VINeVCC1
VIL
Logical ââ0ââ Input Voltage
IIL
Logical ââ0ââ Input Current
Data Clock and ENABLE INPUTS VINe0V
IOH
Logical ââ1ââ Output Current
All Bit Outputs 50 Hz Output VOHe5 25V
500 kHz Output
VOHe2 4V VCCMe4 5V
VOL
Logical ââ0ââ Output Voltage
All Bit Outputs
IOLe5 mA
50 Hz Output 500 kHz Output IOLe250 mA
ICC1
Supply Current (VCC1)
All Bit Outputs High
ICCM(STANDBY) VCCM Supply Current
VCCMe6 0V All Other Pins Open
IOUT
Charge Pump Output Current
1 2VsVOUTsVCCMb1 2V
VCCMs6 0V
Pump Up
Pump Down
TRI-STATE
ICCM(OPERATE) VCCM Supply Current
VCCMe6 0V VCC1e5 25V
All Other Pins Open
Min Typ Max Units
21
V
0
10 mA
07 V
b5 b25 mA
50 mA
b250 mA
05 V
b0 5 V
90 160 mA
1 5 4 0 mA
b0 10 b0 30 b0 6 mA
0 10 0 30 0 6 mA
0 g100 nA
2 5 6 0 mA
AC Electrical Characteristics VCC e 5V TA e 25 C tr s 10 ns tf s 10 ns
Symbol
Parameter
Conditions
Min
VIN(MIN)(F)
VIN(MAX)(F)
FOPERATE
RIN (FM)
RIN (AM)
CIN
tEN1
FIN Minimum Signal Input
FIN Maximum Signal Input
Operating Frequency Range
(Sine Wave Input)
AC Input Resistance FM
AC Input Resistance AM
Input Capacitance FM and AM
Minimum ENABLE High
Pulse Width
AM and FM Inputs 0 C s TA s 70 C
AM and FM Inputs 0 C s TA s 70 C
VIN e 100 mV rms
AM
0 C s TA s 70 C
FM
120 MHz VIN e 100 mV rms
2 MHz VIN e 100 mV rms
VIN e 120 MHz
1000
04
60
300
1000
3
tEN0
Minimum ENABLE Low
Pulse Width
tCLKEN0
Minimum Time before ENABLE
Goes Low that CLOCK must
be Low
tEN0CLK
Minimum Time after ENABLE
Goes Low that CLOCK must
Remain Low
tCLKEN1
Minimum Time before ENABLE
Goes High that Last Positive
CLOCK Edge May Occur
Typ
20
1500
6
625
375
b50
275
300
Max
100
8
120
10
1250
750
0
550
600
Units
mV (rms)
mV (rms)
MHz
MHz
X
X
pF
ns
ns
ns
ns
ns
2
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