54F521DM Datasheet, PDF (2/8 Pages) National Semiconductor (TI) – 8-Bit Identity Comparator

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Pin Names
Description
A₀ – A₇
B₀ – B₇
I_Ae_B
O_Ae_B
Word A Inputs
Word B Inputs
Expansion or Enable Input (Active LOW)
Identity Output (Active LOW)
Truth Table
Inputs
I_A e _B
L
L
H
H
AB
AeB
AⁱB
AeB
AⁱB
Output
O_A e _B
L
H
H
H
54F 74F
UL
HIGH LOW
10 10
10 10
10 10
50 33 3
Input I_IH I_IL
Output I_OH I_OL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b1 mA 20 mA
H e HIGH Voltage Level
L e LOW Voltage Level
A₀ e B₀ A₁ e B₁ A₂ e B₂ etc
Connection Diagrams
Pin Assignment for DIP
SOIC SSOP and Flatpak
Logic Diagram
TL F 9545–2
Pin Assignment
for LCC
TL F 9545 – 5
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays
TL F 9545–3
2