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THS4140 Datasheet, PDF (19/33 Pages) Texas Instruments – HIGH SPEED FULLY DIFFERENTIAL I/O AMPLIFIERS
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THS4140
THS4141
SLOS320F – MAY 2000 – REVISED JANUARY 2006
POWER-DOWN MODE
PRINCIPLES OF OPERATION (continued)
The power-down mode is used when power saving is required. The power-down terminal (PD) found on the
THS414x is an active low terminal. If it is left as a no-connect terminal, the device will always stay on due to an
internal 50 kΩ resistor to VCC. The threshold voltage for this terminal is approximately 1.4 V above VCC–. This
means that if the PD terminal is 1.4 V above VCC–, the device is active. If the PD terminal is less than 1.4 V
above VCC–, the device is off. For example, if VCC– = –5 V, then the device is on when PD reaches 3.6 V, (–5 V
+ 1.4 V = –3.6 V). By the same calculation, the device is off below –3.6 V. It is recommended to pull the terminal
to VCC– in order to turn the device off. Figure 33 shows the simplified version of the power-down circuit. While in
the power-down state, the amplifier goes into a high-impedance state. The amplifier output impedance is
typically greater than 1 MΩ in the power-down state.
VCC
50 kΩ
To Internal Bias
Circuitry Control
PD
VCC-
Figure 33. Simplified Power-Down Circuit
Due to the similarity of the standard inverting amplifier configuration, the output impedance appears to be very
low while in the power-down state. This is because the feedback resistor (Rf) and the gain resistor (R(g)) are still
connected to the circuit. Therefore, a current path is allowed between the input of the amplifier and the output of
the amplifier. An example of the closed-loop output impedance is shown in Figure 34.
2200
OUTPUT IMPEDANCE (IN SHUTDOWN)
vs
FREQUENCY
VCC = ±5 V,
VI = 0.8 VPP RMS
PD = VCC-
1200
200
10 k
100 k
1M
10 M
f - Frequency - Hz
Figure 34.
100 M
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