LMH6657 Datasheet, PDF (18/29 Pages) National Semiconductor (TI) – 270MHz Single Supply, Single & Dual Amplifiers

LMH6657, LMH6658
SNOSA35F – AUGUST 2002 – REVISED MARCH 2013
www.ti.com
OUTPUT PHASE REVERSAL
This is a problem with some operational amplifiers. This effect is caused by phase reversal in the input stage due
to saturation of one or more of the transistors when the inputs exceed the normal expected range of voltages.
Some applications, such as servo control loops among others, are sensitive to this kind of behavior and would
need special safeguards to ensure proper functioning. The LMH6657/6658 is immune to output phase reversal
with input overload. With inputs exceeded, the LMH6657/6658 output will stay at the clamped voltage from the
supply rail. Exceeding the input supply voltages beyond the Absolute Maximum Ratings of the device could
however damage or otherwise adversely effect the reliability or life of the device.
DRIVING CAPACITIVE LOADS
The LMH6657/6658 can drive moderate values of capacitance by utilizing a series isolation resistor between the
output and the capacitive load. Typical Performance Characteristics section shows the settling time behavior for
various capacitive loads and 20Ω of isolation resistance. Capacitive load tolerance will improve with higher
closed loop gain values. Applications such as ADC buffers, among others, present complex and varying
capacitive loads to the Op Amp; best value for this isolation resistance is often found by experimentation and
actual trial and error for each application.
DISTORTION
Applications with demanding distortion performance requirements are best served with the device operating in
the inverting mode. The reason for this is that in the inverting configuration, the input common mode voltage
does not vary with the signal and there is no subsequent ill effects due to this shift in operating point and the
possibility of additional non-linearity. Moreover, under low closed loop gain settings (most suited to low
distortion), the non-inverting configuration is at a further disadvantage of having to contend with the input
common voltage range. There is also a strong relationship between output loading and distortion performance
(i.e. 1kΩ vs. 100Ω distortion improves by about 20dB @100KHz) especially at the lower frequency end where the
distortion tends to be lower. At higher frequency, this dependence diminishes greatly such that this difference is
only about 4dB at 10MHz. But, in general, lighter output load leads to reduced HD3 term and thus improves
THD.
PRINTED CIRCUIT BOARD LAYOUT AND COMPONENT VALUES SECTIONS
Generally, a good high frequency layout will keep power supply and ground traces away from the inverting input
and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and
possible circuit oscillations (see Application Note OA-15 for more information). Texas Instruments suggests the
following evaluation boards as a guide for high frequency layout and as an aid in device testing and
characterization:
Device
LMH6657MF
LMH6657MG
LMH6658MA
LMH6658MM
Package
SOT-23-5
SC-70
8-Pin SOIC
8-Pin VSSOP
Evaluation Board PN
CLC730068
NA
CLC730036
CLC730123
These free evaluation boards are shipped when a device sample request is placed with Texas Instruments.
Another important parameter in working with high speed/high performance amplifiers, is the component values
selection. Choosing external resistors that are large in value will effect the closed loop behavior of the stage
because of the interaction of these resistors with parasitic capacitances. These capacitors could be inherent to
the device or a by-product of the board layout and component placement. Either way, keeping the resistor values
lower, will diminish this interaction to a large extent. On the other hand, choosing very low value resistors will
load down nodes and will contribute to higher overall power dissipation.
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