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LMZ10501 Datasheet, PDF (17/20 Pages) National Semiconductor (TI) – 1A SIMPLE SWITCHER® Nano Module with 5.5V Maximum Input Voltage
Board Layout Considerations
FIGURE 6. Example Top Layer Board Layout
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The board layout of any DC-DC switching converter is critical
for the optimal performance of the design. Bad PCB layout
design can disrupt the operation of an otherwise good
schematic design. Even if the regulator still converts the volt-
age properly, the board layout can mean the difference be-
tween passing or failing EMI regulations. In a Buck converter,
the most critical board layout path is between the input ca-
pacitor ground terminal and the synchronous rectifier ground.
The loop formed by the input capacitor and the power FETs
is a path for the high di/dt switching current during each
switching period. This loop should always be kept as short as
possible when laying out a board for any Buck converter.
The LMZ10501 integrates the inductor and simplifies the DC-
DC converter board layout. Refer to the example layout in
Figure 6. There are a few basic requirements to achieve a
good LMZ10501 layout.
1. Place the input capacitor CIN as close as possible to
the VIN and PGND terminals. VIN (pin 7) and PGND (pin 6)
on the LMZ10501 are next to each other which makes the
input capacitor placement simple.
2. Place the VCON filter capacitor CVC and the RB RT resis-
tive divider as close as possible to the VCON and SGND
terminals.The CVC capacitor (not RB) should be the compo-
nent closer to the VCON pin, as shown in Figure 6. This allows
for better bypass of the control voltage set at VCON.
3. Run the feedback trace (from VOUT to FB) away from
noise sources.
4. Connect SGND to a quiet GND plane.
5. Provide enough PCB area for proper heatsinking. Refer
to the Electrical Characteristics table for example θJA values
for different board areas. Also, refer to AN-2020 for additional
thermal design hints.
Refer to the evaluation board application note (AN-2166) for
a complete board layout example.
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