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| ADC12DS105_08 Datasheet, PDF (16/26 Pages) National Semiconductor (TI) – Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs | |||
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Typical Performance Characteristics Unless otherwise specified, the following specifications apply:
AGND = DRGND = 0V, VA = +3.3V, VDR = +3.0V, Internal VREF = +1.2V, fCLK = 105 MHz, 50% Duty Cycle, DCS disabled, VCM =
VCMO, fIN = 10 MHz, TA = 25°C.
SNR, SINAD, SFDR vs. VA
Distortion vs. VA
20211751
SNR, SINAD, SFDR vs. Clock Duty Cycle
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Distortion vs. Clock Duty Cycle
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SNR, SINAD, SFDR vs. Clock Duty Cycle, DCS Enabled
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Distortion vs. Clock Duty Cycle, DCS Enabled
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