ADC08060_08 Datasheet, PDF (16/20 Pages) National Semiconductor (TI) – 8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter with Internal Sample-and-Hold

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FIGURE 4. The input amplifier should incorporate some gain for best performance (see text).
The RC at the amplifier output filters the clock rate energy that
comes out of the analog input due to the input sampling circuit.
The optimum time constant for this circuit depends not only
upon the amplifier and ADC, but also on the circuit layout and
board material. A resistor value should be chosen between
18Ω and 47Ω and the capacitor value chose according to the
formula
This will provide optimum SNR performance. Best THD per-
formance is realized when the capacitor and resistor values
are both zero. To optimize SINAD, reduce the capacitor or
resistor value until SINAD performance is optimized. That is,
until SNR = −THD. This value will usually be in the range of
40% to 65% of the value calculated with the above formula.
An accurate calculation is not possible because of the board
material and layout dependence.
The above is intended for oversampling or Nyquist applica-
tions. There should be no resistor or capacitor between the
ADC input and any amplifier for undersampling applications.
The circuit of Figure 4 has both gain and offset adjustments.
If you eliminate these adjustments normal circuit tolerances
may cause signal clipping unless care is exercised in the
worst case analysis of component tolerances and the input
signal excursion is appropriately limited to account for the
worst case conditions. Of course, this means that the design-
er will not be able to depend upon getting a full scale output
with maximum signal input.
3.0 POWER SUPPLY CONSIDERATIONS
A/D converters draw sufficient transient current to corrupt
their own power supplies if not adequately bypassed. A
10 µF tantalum or aluminum electrolytic capacitor should be
placed within an inch (2.5 cm) of the A/D power pins, with a
0.1 µF ceramic chip capacitor placed within one centimeter of
the converter's power supply pins. Leadless chip capacitors
are preferred because they have low lead inductance.
While a single voltage source is recommended for the V_A and
DR V_D supplies of the ADC08060, these supply pins should
be well isolated from each other to prevent any digital noise
from being coupled into the analog portions of the ADC. A
choke or 27Ω resistor is recommended between these supply
lines with adequate bypass capacitors close to the supply
pins.
As is the case with all high speed converters, the ADC08060
should be assumed to have little power supply rejection. None
of the supplies for the converter should be the supply that is
used for other digital circuitry in any system with a lot of digital
power being consumed. The ADC supplies should be the
same supply used for other analog circuitry.
No pin should ever have a voltage on it that is in excess of the
supply voltage or below ground by more than 300 mV, not
even on a transient basis. This can be a problem upon appli-
cation of power and power shut-down. Be sure that the sup-
plies to circuits driving any of the input pins, analog or digital,
do not come up any faster than does the voltage at the
ADC08060 power pins.
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