LMX2505 Datasheet, PDF (15/16 Pages) National Semiconductor (TI) – PLLatinu Dual Frequency Synthesizer System with Integrated VCOs

Programming Description (Continued)
R2 REGISTER
The R2 register address bits (R2 [1:0]) are “10”.
R2 REGISTER
MSB
SHIFT REGISTER BIT LOCATION
LSB
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data Field
Address
Field
R2
1
1 0 0 1 0 0 0 0 1 1 1 1 0 000000011 0
(Default)
R3 REGISTER
The R3 register address bits (R3 [2:0]) are “011”. This register is only written to if the SPI_DEF bit is set to 0.
R3 REGISTER
MSB
SHIFT REGISTER BIT LOCATION
LSB
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data Field
Address
Field
R3 1
0 0 0 0 1 1 0 1 0 0 0 0 0 000001101 1
R4 REGISTER
The R4 register address bits (R4 [3:0]) are “0111”. This register is only written to if the SPI_DEF bit is set to 0.
R4 REGISTER
MSB
SHIFT REGISTER BIT LOCATION
LSB
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data Field
Address
Field
R4 0
0 0 0 0 0 1 1 1 0 1 0 0 0 110010011 1
R5 REGISTER
The R5 register address bits (R5 [4:0]) are “01111”. This register is only written to if the SPI_DEF bit is set to 0.
R5 REGISTER
MSB
SHIFT REGISTER BIT LOCATION
LSB
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data Field
Address Field
R5 0
0 0 0 0 0 0 0 0 0 0 0 0 0 000000111 1
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