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LMC7101 Datasheet, PDF (15/18 Pages) National Semiconductor (TI) – Tiny Low Power Operational Amplifier with Rail-To-Rail Input and Output
4.0 Capacitive Load Tolerance
(Continued)
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
DS011991-11
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
5.0 Compensating for Input
Capacitance when Using Large
Value Feedback Resistors
When using very large value feedback resistors, (usually
> 500 kΩ) the large feed back resistance can react with the
input capacitance due to transducers, photodiodes, and cir-
cuit board parasitics to reduce phase margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 5), Cf is first estimated by:
or
R1 CIN ≤ R2 Cf
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for CF may be different. The values of CF should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
DS011991-12
FIGURE 5. Cancelling the Effect of Input Capacitance
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