LP3962 Datasheet, PDF (14/22 Pages) National Semiconductor (TI) – 1.5A Fast Ultra Low Dropout Linear Regulators

Applications Information (Continued)
has a built in hysteresis. The timing diagram in Figure 1
shows the relationship between the ERROR and the output
voltage. In this example, the input voltage is changed to
demonstrate the functionality of the Error Flag.
The internal Error flag comparator has an open drain output
stage. Hence, the ERROR pin should be pulled high through
a pull up resistor. Although the ERROR pin can sink current
of 1mA, this current is energy drain from the input supply.
Hence, the value of the pull up resistor should be in the
range of 10kΩ to 1MΩ. The ERROR pin must be con-
nected to ground if this function is not used. It should
also be noted that when the shutdown pin is pulled low, the
ERROR pin is forced to be invalid for reasons of saving
power in shutdown mode.
10126607
FIGURE 1. Error Flag Operation
Sense Pin
In applications where the regulator output is not very close to
the load, LP3965 can provide better remote load regulation
using the SENSE pin. Figure 2 depicts the advantage of the
SENSE option. LP3962 regulates the voltage at the output
pin. Hence, the voltage at the remote load will be the regu-
lator output voltage minus the drop across the trace resis-
tance. For example, in the case of a 3.3V output, if the trace
resistance is 100mΩ, the voltage at the remote load will be
3.15V with 1.5 A of load current, I_LOAD. The LP3965 regu-
lates the voltage at the sense pin. Connecting the sense pin
to the remote load will provide regulation at the remote load,
as shown in Figure 2. If the sense option pin is not required,
the sense pin must be connected to the V_OUT pin.
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