LM3674 Datasheet, PDF (13/15 Pages) National Semiconductor (TI) – 2MHz, 600mA Step-Down DC-DC Converter in SOT 23-5

Application Information (Continued)
OUTPUT CAPACITOR SELECTION
A ceramic output capacitor of 10 µF, 6.3V is sufficient for
most applications. Use X7R or X5R types; do not use Y5V.
DC bias characteristics of ceramic capacitors must be con-
sidered when selecting case sizes like 0805 and 0603. DC
bias characteristics vary from manufacturer to manufacturer
and dc bias curves should be requested from them as part of
the capacitor selection process.
The minimum output capacitance to guarantee good
performance is 5.75µF at 1.8V dc bias including toler-
ances and over ambient temperature range. The output
filter capacitor smoothes out current flow from the inductor to
the load, helps maintain a steady output voltage during
transient load changes and reduces output voltage ripple.
These capacitors must be selected with sufficient capaci-
tance and sufficiently low ESR to perform these functions.
The output voltage ripple is caused by the charging and
discharging of the output capacitor and by the R_ESR and can
be calculated as:
Voltage peak-to-peak ripple due to capacitance can be ex-
pressed as follow:
Because these two components are out of phase the rms
value can be used to get an approximate value of peak-to-
peak ripple.
Voltage peak-to-peak ripple, root mean squared =
Note that the output ripple is dependent on the current ripple
and the equivalent series resistance of the output capacitor
(R_ESR).
The R_ESR is frequency dependent (as well as temperature
dependent); make sure the value used for calculations is at
the switching frequency of the part.
Voltage peak-to-peak ripple due to ESR =
TABLE 3. Suggested Capacitors and Their Suppliers
Model
10 µF for C_OUT
GRM21BR60J106K
C2012X5R0J106K
JMK212BJ106K
4.7 µF for C_IN
GRM21BR60J475K
JMK212BJ475K
C2012X5R0J475K
Type
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Vendor
Murata
TDK
Taiyo-Yuden
Murata
Taiyo-Yuden
TDK
Voltage Rating
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
Case size inch (mm)
0805 (2012)
0805 (2012)
0805 (2012)
0805 (2012)
0805 (2012)
0805 (2012)
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter
design. Poor board layout can disrupt the performance of a
DC-DC converter and surrounding circuitry by contributing to
EMI, ground bounce, and resistive voltage loss in the traces.
These can send erroneous signals to the DC-DC converter
IC, resulting in poor regulation or instability.
13
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