LM3641 Datasheet, PDF (13/16 Pages) National Semiconductor (TI) – Lithium-Ion Battery Pack Protection Circuit

Application Circuit
FIGURE 6. Application Circuit
DS012931 17
The pack current flows through the series path of the cell, the
sense resistor and the power MOSFETs, M1 and M2. M3
isolates the IC against high compliance voltage chargers
when the power MOSFETs are OFF. The V− pin detects the
polarity of voltage across the power MOSFETs. R1 limits the
current into the V− pin when a charger is applied and the
MOSFETs are OFF. R3 and R4 limit the current into the IC in
the event of extreme charge current. They also prevent the
cell to be shorted when the V_DD or V+ pin becomes shorted,
either internally or externally. R5 provides ESD protection of
the IC from the pack terminal “E”. C1 bypasses transient Cell
currents so that the IC supply current is not interrupted. The
bypass of V_DD is critical for stable operation, therefore it is
advised that 2 parallel bypass capacitors C1A and C1B be
used for redundancy. C2 is necessary to prevent the power
MOSFETs from oscillating when the pack is short circuited.
C3 suppresses possible oscillation of the MOSFETs during
pack short circuit. C3 can be duplicated for extra safety. The
same can be said for R2, which is used for proper turn OFF
of the MOSFETs during a fault condition. C4 isolates the En-
able pin from false reset signals during a pack short circuit
event. Series C2 and C3 also provide high frequency bypass
of the Cells which exhibit large impedance increase beyond
10–100 kHz. R6 has to be added to pull up the Full pin. The
Enable section is optional. R5 and C4 are only needed if the
3rd terminal of the pack is used for the Enable function (see
Product Description, “Enable Pin” section). If not used, short
the Enable pin to the V_DD pin.
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