LM3431_08 Datasheet, PDF (13/24 Pages) National Semiconductor (TI) – 3-Channel Constant Current LED Driver with Integrated Boost Controller

stability and the Δi_L requirements, a value close to minimum
will typically give the best performance.
CURRENT SENSING
Switch current is sensed via the sense resistor, R3, while the
switch is on and the inductor is charging. The sensed current
is used to control switching and to monitor current limit. To
optimize the control signal, a typical sense voltage between
50mV and 200mV is recommended. The sense resistor can
therefore be calculated by the following equation:
Since I_L(AVE) will vary with input voltage, R3 should be deter-
mined based on the full input voltage range, although the
resulting value may extend somewhat outside the recom-
mended range.
CURRENT LIMIT
Current limit occurs when the voltage across the sense re-
sistor (measured at the CS pin) equals the current limit thresh-
old voltage. The current limit threshold is set by R4. This value
can be calculated as follows:
Where 40 µA is the typical ILIM source current in current limit
and ILlim is the peak (not average) inductor current which
triggers current limit.
To avoid false triggering, current limit should be set safely
above the peak inductor current level. However, the current
limit resistor also has some effect on the control loop as seen
in the block diagram. For this reason, R4 should not be set
much higher than necessary. When current limit is activated,
the NFET will be turned off immediately until the next cycle.
Current limit will typically result in a drop in output and cathode
voltage. This will cause the COMP pin voltage to increase to
maximum, which will trigger a fault and start the DLY pin
source current (see LED Protection section). The LM3431 will
continue to operate in current limit with reduced on-time until
the DLY pin has reached its threshold. However, the current
limit cannot reduce the on-time below the minimum specifi-
cation.
In a boost switcher, there is a direct current path between
input and output. Therefore, although the LM3431 will shut-
down in a shorted output condition, there are no means to limit
the current flowing from input to output.
Note that if the maximum duty cycle of 85% (typical) is
reached, the LM3431 will behave as though current limit has
occurred.
VCC
The VCC pin is the output of the internal voltage regulator. It
must be bypassed to PGND with a minimum 4.7 µF ceramic
capacitor. Although VCC is capable of supplying up to 72 mA,
external loads will increase the power dissipation and tem-
perature rise within the LM3431. See the TSD section for
more detail. Above 72 mA, the VCC voltage will drop due to
current limit. Since the UVLO threshold is monitored at this
pin, UVLO may be enabled by a VCC over current event.
For input voltages between 4.5V and 5.5V, connect VCC to
V_IN through a 4.7Ω resistor. This will hold VCC above the UV-
LO threshold and allow operation at input voltages as low as
4.5V. It may also be necessary to add additional V_IN and VCC
capacitance for low V_IN operation.
DIODE SELECTION
The average current through D1 is the average load current
(total LED current), and the peak current through the diode is
the peak inductor current. Therefore, the diode should be rat-
ed to handle more than the peak inductor current which was
calculated earlier. The diode must also be capable of handling
the peak reverse voltage, which is equal to the output voltage
(LED Anode voltage). To improve efficiency, a low Vf Schottky
diode is recommended. Diode power loss is calculated as:
P_DIODE = Vf x I_OUT
NFET SELECTION
The drive pin of the LM3431 boost switcher, LG, must be
connected to the gate of an external NFET. The NFET drain
is connected to the inductor and the source is connected to
the sense resistor. The LG pin will drive the gate at 5V typi-
cally.
The critical parameters for selection of a MOSFET are:
1. Maximum drain current rating, I_D(MAX)
2. Maximum drain to source voltage, V_DS(MAX)
3. On-resistance, R_DS(ON)
4. Total gate charge, Q_g
In the on-state, the switch current is equal to the inductor cur-
rent. Therefore, the maximum drain current, I_D, must be rated
higher than the current limit setting. The average switch cur-
rent (_ID(AVE)) is given in the equation below:
I_D(AVE) = I_L(AVE) x D
The off-state voltage of the NFET is approximately equal to
the output voltage plus the diode Vf. Therefore, V_DS(MAX) of
the NFET must be rated higher than the maximum output
voltage. The power losses in the NFET can be separated into
conduction losses and switching losses. The conduction loss,
Pcond, is the I²R loss across the NFET. The maximum con-
duction loss is given by:
P_COND = R_DS(ON) x D_MAX x I_L(AVE)2
where D_MAX is the maximum duty cycle for the given applica-
tion and R_DS(ON) is the on resistance at high temperature. The
switching losses can be roughly calculated by the following
equation:
Where t_ON and t_OFF are the NFET turn-on and turn-off times.
Power is also consumed in the LM3431 in the form of gate
charge losses, P_g. These losses can be calculated using the
formula:
P_g = f_SW x Q_g x V_IN
where Q_g is the NFET total gate charge. Pg adds to the total
power dissipation of the LM3431 (See TSD section).
Fast switching FETs can cause noise spikes at the SW node
which may affect performance. To reduce these spikes a drive
resistor up to 10Ω can be placed between LG and the NFET
gate.
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