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| ADC12DL040 Datasheet, PDF (12/26 Pages) National Semiconductor (TI) – Dual 12-Bit, 40 MSPS, 3V, 210mW A/D Converter | |||
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Typical Performance Characteristics DNL, INL Unless otherwise specified, the following
specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.0V, VDR = +2.5V, PD = 0V, VREF = +1.0V, fCLK = 40
MHz, fIN = 0, tr = tf = 2 ns, CL = 15 pF/pin, Duty Cycle Stabilizer On, parallel output mode. Boldface limits apply for TJ =
TMIN to TMAX: all other limits TJ = 25ËC
DNL
INL
DNL vs. fCLK
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INL vs. fCLK
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DNL vs. Clock Duty Cycle
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INL vs. Clock Duty Cycle
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