LP38859 Datasheet, PDF (11/14 Pages) National Semiconductor (TI) – 3A Fast-Response High-Accuracy LDO Linear Regulator with Soft-Start

Application Information (Continued)
Since the V_OUT rise will be exponential, not linear, the in-rush
current will peak during the first time constant (τ), and V_OUT
will require four additional time constants (4τ) to reach the
final value (5τ) .
After achieving normal operation, should V_BIAS fall below the
ULVO threshold the device output will be disabled and the
Soft-Start capacitor (C_SS) discharge circuit will become ac-
tive. The C_SS discharge circuit will remain active until V_BIAS
falls to 500 mV (typical). When V_BIAS falls below 500 mV
(typical), the C_SS discharge circuit will cease to function due
to a lack of sufficient biasing to the control circuitry.
Since V_REF appears on the SS pin, any leakage through C_SS
will cause V_REF to fall, and thus affect V_OUT. A leakage of 50
nA (about 10 MΩ) through C_SS will cause V_OUT to be ap-
proximately 0.1% lower than nominal, while a leakage of 500
nA (about 1 MΩ) will cause V_OUT to be approximately 1%
lower than nominal. Typical ceramic capacitors will have a
factor of 10X difference in leakage between 25˚C and 85˚C,
so the maximum ambient temperature must be included in
the capacitor selection process.
Typical C_SS values will be in the range of 1 nF to 100 nF,
providing typical Soft-Start times in the range of 70 µs to 7
ms (5τ). Values less than 1 nF can be used, but the Soft-
Start effect will be minimal. Values larger than 100 nF will
provide soft-start, but may not be fully discharged if V_BIAS
falls from the UVLVO threshold to less than 500 mV in less
than 100 µs.
Figure 1 shows the relationship between the C_OUT value and
a typical C_SS value.
vice. Under all possible conditions, the junction temperature
must be within the range specified under operating condi-
tions.
The total power dissipation of the device is the sum of three
different points of dissipation in the device.
The first part is the power that is dissipated in the NMOS
pass element, and can be determined with the formula:
P_D(PASS) = (V_IN - V_OUT) x I_OUT
(2)
The second part is the power that is dissipated in the bias
and control circuitry, and can be determined with the for-
mula:
P_D(BIAS) = V_BIAS x I_GND(BIAS)
(3)
where I_GND(BIAS) is the portion of the operating ground cur-
rent of the device that is related to V_BIAS.
The third part is the power that is dissipated in portions of the
output stage circuitry, and can be determined with the for-
mula:
P_D(IN) = V_IN x I_GND(IN)
(4)
where I_GND(IN) is the portion of the operating ground current
of the device that is related to V_IN.
The total power dissipation is then:
P_D = P_D(PASS) + P_D(BIAS) + P_D(IN)
(5)
The maximum allowable junction temperature rise (∆T_J) de-
pends on the maximum anticipated ambient temperature
(T_A) for the application, and the maximum allowable operat-
ing junction temperature (T_J(MAX)) .
(6)
The maximum allowable value for junction to ambient Ther-
mal Resistance, θ_JA, can be calculated using the formula:
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FIGURE 1. Typical C_SS vs C_OUT Values
The C_SS capacitor must be connected to a clean ground
path back to the device ground pin. No components, other
than C_SS, should be connected to the SS pin, as there could
be adverse effects to V_OUT.
If the Soft-Start function is not needed the SS pin should be
left open, although some minimal capacitance value is al-
ways recommended.
POWER DISSIPATION AND HEAT-SINKING
Additional copper area for heat-sinking may be required
depending on the maximum device dissipation (P_D) and the
maximum anticipated ambient temperature (T_A) for the de-
(7)
Heat-Sinking The TO-220 Package
The TO220-5 package has a θ_JA rating of 60˚C/W and a θ_JC
rating of 3˚C/W. These ratings are for the package only, no
additional heat-sinking, and with no airflow. If the needed
θ_JA, as calculated above, is greater than or equal to 60˚C/W
then no additional heat-sinking is required since the package
can safely dissipate the heat and not exceed the operating
T_J(MAX). If the needed θ_JA is less than 60˚C/W then addi-
tional heat-sinking is needed.
The thermal resistance of a TO-220 package can be reduced
by attaching it to a heat sink or a copper plane on a PC
board. If a copper plane is to be used, the values of θ_JA will
be same as shown in next section for TO-263 package.
The heat-sink to be used in the application should have a
heat-sink to ambient thermal resistance, θ_HA:
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