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LM3420-42 Datasheet, PDF (11/17 Pages) National Semiconductor (TI) – Lithium-Ion Battery Charge Controller
Compensation (Continued)
portant when analyzing closed loop stability. The minimum
and maximum room temperature values of this resistor are
specified in the Electrical Characteristics section of this data
sheet, and a curve showing the temperature coefficient is
shown in the curves section. Minimum values of Rf result in
lower phase margins.
Test Circuit
The test circuit shown in Figure 2 can be used to measure
and verify various LM3420 parameters. Test conditions are
set by forcing the appropriate voltage at the VOUT Set test
point and selecting the appropriate RL or IOUT as specified in
the Electrical Characteristics section. Use a DVM at the
“measure” test points to read the data.
FIGURE 2. LM3420 Test Circuit
VREG External Voltage Trim
The regulation voltage (VREG) of the LM3420 can be exter-
nally trimmed by adding a single resistor from the COMP pin
to the +IN pin or from the COMP pin to the GND pin, depend-
ing on the desired trim direction. Trim adjustments up to
±10% of VREG can be realized, with only a small increase in
the temperature coefficient. (See temperature coefficient
curve shown in Figure 3 below.)
DS012359-7
DS012359-9
Increasing VREG
DS012359-8
Normalized Temperature Drift with
Output Externally Trimmed
DS012359-10
Decreasing VREG
FIGURE 4. Changing VREG
Formulas for selecting trim resistor values are shown below,
based on the percent of increase (%incr) or percent of de-
crease (%decr) of the output voltage from the nominal volt-
age.
For LM3420-4.2
Rincrease = 22x105/%incr
Rdecrease = (53x105/%decr) − 75x103
For LM3420-8.2
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