LM27341 Datasheet, PDF (11/30 Pages) National Semiconductor (TI) – 2 MHz 1.5A/2A Wide Input Range Step-Down DC-DC Regulator with Frequency Synchronization

BOOST FUNCTION
Capacitor C₂ in Figure 1, commonly referred to as C_BOOST, is
used to store a voltage V_BOOST. When the LM27341/LM27342
starts up, an internal LDO charges C_BOOST ,via an internal
diode, to a voltage sufficient to turn the internal NMOS switch
on. The gate drive voltage supplied to the internal NMOS
switch is V_BOOST - V_SW.
During a normal switching cycle, when the internal NMOS
control switch is off (t_OFF) (refer to Figure 2), V_BOOST equals
V_LDO minus the forward voltage of the internal diode (V_D2). At
the same time the inductor current (i_L) forward biases the
catch diode D1 forcing the SW pin to swing below ground by
the forward voltage drop of the catch diode (V_D1). Therefore,
the voltage stored across C_BOOST is
V_BOOST - V_SW = V_LDO - V_D2 + V_D1
Thus,
V_BOOST = V_SW + V_LDO - V_D2 + V_D1
When the NMOS switch turns on (t_ON), the switch pin rises to
V_SW = V_IN – (R_DSON x I_L),
reverse biasing D1, and forcing V_BOOST to rise. The voltage
at V_BOOST is then
V_BOOST = V_IN – (R_DSON x I_L) + V_LDO – V_D2 + V_D1
which is approximately
V_IN + V_LDO- 0.4V
V_BOOST has pulled itself up by its "bootstraps", or boosted to
a higher voltage.
LOW INPUT VOLTAGE CONSIDERATIONS
When the input voltage is below 5V and the duty cycle is
greater than 75 percent, the gate drive voltage developed
across C_BOOST might not be sufficient for proper operation of
the NMOS switch. In this case, C_BOOST should be charged via
an external Schottky diode attached to a 5V voltage rail, see
Figure 3. This ensures that the gate drive voltage is high
enough for proper operation of the NMOS switch in the triode
region. Maintain V_BOOST - V_SW less than the 6V absolute max-
imum rating.
30005636
FIGURE 4. Minimum Load Current for L = 1.5 µH
ENABLE PIN / SHUTDOWN MODE
Connect the EN pin to a voltage source greater than 1.8V to
enable operation of the LM27341/LM27342. Apply a voltage
less than 0.4V to put the part into shutdown mode. In shut-
down mode the quiescent current drops to typically 70 nA.
Switch leakage adds another 40 nA from the input supply. For
proper operation, the LM27341/LM27342 EN pin should nev-
er be left floating, and the voltage should never exceed V_IN +
0.3V.
The simplest way to enable the operation of the LM27341/
LM27342 is to connect the EN pin to AVIN which allows self
start-up of the LM27341/LM27342 when the input voltage is
applied.
When the rise time of V_IN is longer than the soft-start time of
the LM27341/LM27342 this method may result in an over-
shoot in output voltage. In such applications, the EN pin
voltage can be controlled by a separate logic signal, or tied to
a resistor divider, which reaches 1.8V after V_IN is fully estab-
lished (see Figure 5). This will minimize the potential for
output voltage overshoot during a slow V_IN ramp condition.
Use the lowest value of V_IN , seen in your application when
calculating the resistor network, to ensure that the 1.8V min-
imum EN threshold is reached.
30005626
FIGURE 3. External Diode Charges C_BOOST
HIGH OUTPUT VOLTAGE CONSIDERATIONS
When the output voltage is greater than 3.3V, a minimum load
current is needed to charge C_BOOST, see Figure 4. The mini-
mum load current forward biases the catch diode D1 forcing
the SW pin to swing below ground. This allows C_BOOST to
charge, ensuring that the gate drive voltage is high enough
for proper operation. The minimum load current depends on
many factors including the inductor value.
11
FIGURE 5. Resistor Divider on EN
30005608
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