DS90CR583 Datasheet, PDF (11/12 Pages) National Semiconductor (TI) – LVDS 24-Bit Color Flat Panel Display (FPD) Link─65 MHz

DS90CR583 Pin Descriptions — FPD Link Transmitter (Continued)
Pin Name
GND
PLL V_CC
PLL GND
LVDS V_CC
LVDS GND
I/O No.
I5
I1
I2
I1
I3
Ground pins for TTL inputs
Power supply pin for PLL
Ground pins for PLL
Power supply pin for LVDS outputs
Ground pins for LVDS outputs
Description
DS90CR584 Pin Descriptions — FPD Link Receiver
Pin Name
RxIN+
RxIN−
RxOUT
RxCLK IN+
RxCLK IN−
FPSHIFT
OUT
PWR DOWN
V_CC
GND
PLL V_CC
PLL GND
LVDS V_CC
LVDS GND
I/O No.
I4
I4
O 28
I1
I1
O1
I1
I4
I5
I1
I2
I1
I3
Description
Positive LVDS differential data inputs
Negative LVDS differential data inputs
TTL level data outputs. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines — FPLINE,
FPFRAME, DRDY and CNTL (also referred to as HSYNC, VSYNC, Data Enable, CNTL)
Positive LVDS differential clock input
Negative LVDS differential clock input
TTL level clock output. The falling edge acts as data strobe
TTL level input. Assertion (low input) maintains the receiver outputs in the previous state
Power supply pins for TTL outputs
Ground pins for TTL outputs
Power supply for PLL
Ground pin for PLL
Power supply pin for LVDS inputs
Ground pins for LVDS inputs
Connection Diagrams
DS012618-22
11
DS012618-23
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