ADC10D1000_09 Datasheet, PDF (10/70 Pages) National Semiconductor (TI) – Low Power, 10-Bit, Dual 1.0/1.5 GSPS or Single 2.0/3.0 GSPS ADC

Ball No.
Name
V5
DES
V4
CalDly
D6
CAL
B5
CalRun
TABLE 2. Control and Status Balls
Equivalent Circuit
Description
Dual Edge Sampling (DES) Mode select. In the
Non-Extended Control Mode (Non-ECM), when
this input is set to logic-high, the DES Mode of
operation is selected, meaning that the VinI input
is sampled by both channels in a time-interleaved
manner. The VinQ input is ignored. When this
input is set to logic-low, the device is in Non-DES
Mode, i.e. the I- and Q-channels operate
independently. In the Extended Control Mode
(ECM), this input is ignored and DES Mode
selection is controlled through the Control
Register by the DES Bit (Addr: 0h, Bit 7); default
is Non-DES Mode operation.
Calibration Delay select. By setting this input
logic-high or logic-low, the user can select the
device to wait a longer or shorter amount of time,
respectively, before the automatic power-on self-
calibration is initiated. This feature is pin-
controlled only and is always active during ECM
and Non-ECM.
Calibration cycle initiate. The user can command
the device to execute a self-calibration cycle by
holding this input high a minimum of t_{CAL_H} after
having held it low a minimum of t_{CAL_L}. If this input
is held high at the time of power-on, the automatic
power-on calibration cycle is inhibited until this
input is cycled low-then-high. This pin is active in
both ECM and Non-ECM. In ECM, this pin is
logically OR'd with the CAL Bit (Addr: 0h, Bit 15)
in the Control Register. Therefore, both pin and
bit must be set low and then either can be set high
to execute an on-command calibration.
Calibration Running indication. This output is
logic-high while the calibration sequence is
executing. This output is logic-low otherwise.
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