TP3401 Datasheet, PDF (1/16 Pages) National Semiconductor (TI) – DASL Digital Adapter for Subscriber Loops

December 1991
TP3401 TP3402 TP3403
DASL Digital Adapter for Subscriber Loops
General Description
The TP3401 TP3402 and TP3403 are complete monolithic
transceivers for data transmission on twisted pair subscriber
loops They are built on National’s double poly microCMOS
process and require only a single a5 Volt supply Alternate
Mark Inversion (AMI) line coding in which binary ‘1’s are
alternately transmitted as a positive pulse then a negative
pulse is used to ensure low error rates in the presence of
noise with lower emi radiation than other codes such as Bi-
phase (Manchester)
Full-duplex transmission at 144 kb s is achieved on a single
twisted wire pair using a burst-mode technique (Time Com-
pression Multiplexed) Thus the device operates as an ISDN
‘U’ Interface for short loop applications typically in a PBX
environment providing transmission for 2 B channels and 1
D channel On 24 cable the range is at least 1 8 km
(6k ft)
System timing is based on a Master Slave configuration
with the line card end being the Master which controls loop
timing and synchronisation All timing sequences necessary
for loop activation and de-activation are generated on-chip
Selection of Master and Slave mode operation is pro-
grammed via the Microwire Control Interface
A 2 048 MHz clock which may be synchronized to the sys-
tem clock controls all transmission-related timing functions
For the TP3401 this clock must be provided from an exter-
nal source the TP3402 includes an oscillator circuit requir-
ing an external crystal The TP3403 includes the functions
of both the TP3401 and the TP3402
Block Diagram
Features
Complete ISDN PBX 2-Wire Data Transceiver including
Y _{2 B plus D channel interface for PBX U Interface}
Y _{144 kb s full-duplex on 1 twisted pair using Burst Mode}
Y _{Loop range up to 6 kft ( 24AWG)}
Y _{Alternate Mark Inversion coding with transmit filter and}
scrambler for low emi radiation
Y _{Adaptive line equalizer}
Y _{On-chip timing recovery no external components}
Y _{Standard TDM interface for B channels}
Y _{Separate interface for D channel}
Y _{2 048 MHz master clock}
Y _{Driver for line transformer}
Y _{4 loop-back test modes}
Y _Single a_{5V supply}
Y _MICROWIRETM _{compatible serial control interface}
Y _{Applications in}
PBX Line Cards
Terminals
Regenerators
Y _{Available in both 20-pin DIP and 28-pin PLCC}
Note 1 TP3401 only
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRETM is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL H 9264
TL H 9264 – 1
RRD-B30M115 Printed in U S A