TP11362A Datasheet, PDF (1/16 Pages) National Semiconductor (TI) – Quad Adaptive Differential PCM Processor

March 1997
TP11362A
Quad Adaptive Differential PCM Processor
General Description
The TP11362A is a quad (4) channel Adaptive Differential
Pulse Code Modulation (ADPCM) transcoder, fully compat-
ible to ITU G.726 recommendation in 40 kbps, 32 kbps,
24 kbps, 16 kbps and ANSI 32 kbps modes. The TP11362A
ADPCM processor can operate on up to 8 independent
channels in an 8 kHz frame. Each channel is individually
configured, supporting both full and half duplex operation. All
input/output transfers occur on an interrupt basis using se-
rial, double buffered data registers. Together with National’s
TP3054/57 COMBO^® or TP3070/71 COMBO II devices, the
TP11362A forms complete ADPCM channels with Codec/
filtering.
Features
n CCITT G.726 compatible at 40, 32, 24, 16 kbps
n ANSI T1.301 compatible at 32 kbps
n 8-channel half-duplex (encode or decode) or 4-channel
full-duplex operation in 8 kHz frame
n Each channel individually configurable
n Selectable µ-law or A-law PCM coding
n Asynchronous 8 MHz master clock operation
n TTL and CMOS compatible inputs and outputs
n 28-pin PLCC or 24-pin DIP packages
n Power consumption of typ. 6 mW at +5V per full-duplex
channel
n On-Chip Power-On-Reset
n −40˚C to +85˚C operating temperature range
n Single 5V supply
Block Diagram
FIGURE 1. Block Diagram
TRI-STATE^® and COMBO^® are registered trademarks of National Semiconductor Corporation.
© 1997 National Semiconductor Corporation DS012877
DS012877-1
www.national.com