SCAN926260_03 Datasheet, PDF (1/20 Pages) National Semiconductor (TI) – Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

March 6, 2008
SCAN926260
Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and
At-Speed BIST
General Description
The SCAN926260 integrates six 10-bit deserializer devices
into a single chip. The SCAN926260 can simultaneously de-
serialize up to six data streams that have been serialized by
National Semiconductor’s 10-bit Bus LVDS serializers. In ad-
dition, the SCAN926260 is compliant with IEEE standard
1149.1 and also features an At-Speed Built-In Self Test
(BIST). For more details, please see the sections titled "IEEE
1149.1 Test Modes" and "BIST Alone Test Modes."
Each deserializer block in the SCAN926260 has it’s own pow-
erdown pin (PWRDWN[n])and operates independently with
its own clock recovery circuitry and lock-detect signaling. In
addition, a master powerdown pin (MS_PWRDWN) which
puts all the entire device into sleep mode is provided.
The SCAN926260 uses a single +3.3V power supply and
consumes 1.2W at 3.3V with a PRBS-15 pattern on all chan-
nels at 660Mbps.
Features
■ ^{Deserializes one to six Bus LVDS input serial data streams}
with embedded clocks
■ ^{IEEE 1149.1 (JTAG) Compliant and At-Speed BIST test}
modes
■ ^{Parallel clock rate 16-66MHz}
■ ^{On chip filtering for PLL}
■ ^{High impedance inputs upon power off (V}_cc ^{= 0V)}
■ ^{Single power supply at +3.3V}
■ ^{196-pin LBGA package (Low-profile Ball Grid Array)}
package
■ ^{Industrial temperature range operation: −40°C to +85°C}
■ ^{ROUTn[0:9] and RCLKn default high when channel is not}
locked
■ ^{Powerdown per channel to conserve power on unused}
channels
Typical Application
Ordering Information
Order Number
SCAN926260TUF
SCAN926260TUFX
20028302
Function
Six Channel 10-bit BLVDS Deserializer
with IEEE 1149.1 and At-Speed BIST
Six Channel 10-bit BLVDS Deserializer
with IEEE 1149.1 and At-Speed BIST
Package
UJB196A (Trays)
UJB196A (Tape and Reel)
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