SCAN18541T Datasheet, PDF (1/14 Pages) National Semiconductor (TI) – Non-Inverting Line Driver with TRI-STATE Outputs

September 1998
SCAN18541T
Non-Inverting Line Driver with TRI-STATE^® Outputs
General Description
The SCAN18541T is a high speed, low-power line driver fea-
turing separate data inputs organized into dual 9-bit bytes
with byte-oriented paired output enable control signals. This
device is compliant with IEEE 1149.1 Standard Test Access
Port and Boundary Scan Architecture with the incorporation
of the defined boundary-scan test logic and test access port
consisting of Test Data Input (TDI), Test Data Out (TDO),
Test Mode Select (TMS), and Test Clock (TCK).
Features
n IEEE 1149.1 (JTAG) Compliant
n Dual output enable signals per byte
n TRI-STATE outputs for bus-oriented applications
n 9-bit data busses for parity applications
n Reduced-swing outputs source 24 mA/sink 48 mA (Mil)
n Guaranteed to drive 50Ω transmission line to TTL input
levels of 0.8V and 2.0V
n TTL compatible inputs
n 25 mil pitch Cerpack packaging
n Includes CLAMP and HIGHZ instructions
n Standard Microcircuit Drawing (SMD) 5962-9311601
Connection Diagram
Pin Names
AOE₁,
AOE₂
BOE₁,
BOE₂
AO_(0–8)
AO_(0–8)
Description
TRI-STATE Output Enable Input Pins,
A Side
TRI-STATE Output Enable Input Pins,
B Side
Output Pins, A Side
Output Pins, B Side
Pin Names
DS100324-1
Pin Names
AI_(0–8)
BI_(0–8)
Description
Input Pins, A Side
Input Pins, B Side
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100324
www.national.com