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PC87410 Datasheet, PDF (1/16 Pages) National Semiconductor (TI) – PC87410 PCI-IDE Interface Controller
October 1994
PC87410 PCI-IDE Interface Controller
General Description
The PCI-IDE Interface Controller is designed to interface the
IDE drive directly onto the PCI bus It provides write posting
and read pre-fetches allowing the CPU to run concurrently
with IDE cycles It connects IDE drIves ‘‘gluelessly’’ into the
PCI bus and supports faster ATA devices using modes 1 2
and 3 through PIO accesses It supports dual IDE channels
for up to four drives and works seamlessly with the National
Semiconductor’s SuperI OTM family of products
A full suite of software drives included with device are fully
tested with DOS 5 0–6 x Windows 3 x–4 x Windows NT
OS 2 2 x Novell Netware 3 1x–4 x and SCO UNIX 3 x
Key Features
Y Fully compatible with PCI specifications rev 2 0 (April
1993)
Y Programmable Base Address registers
Y Interfaces with the 32 bits PCI local bus to IDE drives
Y Support IDE PIO timing mode 0 1 2 of ANSI ATA
specifications
Y Support Mode 3 (11 MB s) timing proposal on en-
hanced IDE (IDE-2 or ATA-2) specifications
Y Two IDE-2 channel supported (each channel supports 2
devices)
Y Supports primary IDE or secondary IDE address
Y 16-Byte FIFO provide 4-level Posted Write and Read
ahead buffers per channel for concurrent system
operation
Y Programmable command and recovery timing for reads
and writes per channel
Y Independent timings for command registers and data
registers
Y Slew rate controlled output directly interface with IDE
devices
Y Supports either IRQ14 15 or INTA B
Y Hardware and Software chip enable disable capability
Y 100 pin PQFP package NO other glue logic needed
and 12 mA transceivers are built in
Block Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
SuperI OTM is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 12073
TL F 12073 – 1
RRD-B30M75 Printed in U S A