NM27P512 Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – 524,288-Bit (64K x 8) Processor Oriented CMOS EPROM

December 1993
NM27P512
524 288-Bit (64K x 8) Processor Oriented
CMOS EPROM
General Description
The NM27P512 is a 512K Processor Oriented EPROM con-
figured as 64k x 8 It’s designed to simplify microprocessor
interfacing while remaining compatible with standard
EPROMs It can reduce both wait states and glue logic
when the specification improvements are taken advantage
of in the system design The NM27P512 is implemented in
National’s advanced CMOS EPROM process to provide ex-
cellent reliability and access times as fast as 120 ns
The interface improvements address two areas to eliminate
the need for additional devices to adapt the EPROM to the
microprocessor and to eliminate wait states at the termina-
tion of the access cycle Even with these improvements the
NM27P512 remains compatible with industry standard
JEDEC pinout EPROMs The maximum specification for out-
put turn-off time has been reduced eliminating the need for
wait states at the end of a read cycle Also the minimum
specification for output hold time has been increased elimi-
nating the need for external circuitry to hold the data
Features
Y _{Fast output turn off to eliminate wait states}
Y _{Extended data hold time for microprocessor}
compatibility
Y _{High performance CMOS}
120 ns access time
Y _{JEDEC standard pin configuration}
Y _{Manufacturer’s identification code}
Block Diagram
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C1995 National Semiconductor Corporation TL D 11365
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