NM25C04L Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – 4096-Bit Serial Interface CMOS EEPROM (Serial Peripheral Interface Synchronous Bus)

November 1993
NM25C04L 4096-Bit Serial Interface CMOS EEPROM
(Serial Peripheral Interface (SPI^TM) Synchronous Bus)
General Description
The NM25C04L is a 4096-bit CMOS EEPROM with an SPI
compatible serial interface The NM25C04L is designed for
data storage in applications requiring both non-volatile
memory and in-system data updates This EEPROM is well
suited for applications using the 68HC11 series of micro-
controllers that support the SPI interface for high speed
communication with peripheral devices via a serial bus to
reduce pin count The NM25C04L is implemented in Nation-
al Semiconductor’s single poly double metal CMOS pro-
cess that provides superior endurance and data retention
The serial data transmission of this device requires four sig-
nal lines to control the device operation Chip Select (CS)
Clock (SCK) Data In (SI) and Data Out (SO) All program-
ming cycles are completely self-timed and do not require an
erase before WRITE
BLOCK WRITE protection is provided by programming the
STATUS REGISTER with one of four levels of write protec-
tion Additionally separate program enable and program
disable instructions are provided for data protection
Hardware data protection is provided by the WP pin to pro-
tect against accidental data changes The HOLD pin allows
the serial communication to be suspended without resetting
the serial sequence
Features
Y _{4096 bits organized as 512 bytes}
Y _{Multiple chips on the same 3-wire bus with separate}
chip select lines
Y _{Self-timed programming cycle}
Y _{Simultaneous programming of 1 to 4 bytes at a time}
Y _{Status register can be polled during programming to}
monitor RDY BUSY
Y _{Write Protect (WP) pin and write disable instruction for}
both hardware and software write protection
Y _{Block write protect feature to protect against accidental}
writes
Y _{Endurance 10}6 _{data changes}
Y _{Data retention greater than 40 years}
Y _{Packages available 8-pin DIP or 8-pin SO}
Block Diagram
SPITM is a trademark of Motorola Incorporated
C1995 National Semiconductor Corporation TL D 11729
TL D 11729 – 1
RRD-B30M65 Printed in U S A