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LP2996 Datasheet, PDF (1/18 Pages) National Semiconductor (TI) – DDR Termination Regulator
2003 ೥ 11 ݄
LP2996
DDR λʔϛωʔγϣϯɾϨΪϡϨʔλ
֓ཁ
LP2996 ͸ɺJEDEC ඪ४ͷ SSTL-2 ࢓༷ʹద߹͢Δ DDR-
SDRAM λʔϛωʔγϣϯͷϦχΞɾϨΪϡϨʔλͰ͢ɻ LP2996 ͸
ෛՙมಈʹରͯ͠༏ΕͨԠ౴Λൃ͢شΔߴ଎ΦϖΞϯϓΛ಺ଂ
͍ͯ͠·͢ɻग़ྗஈ͸ 1.5A ͷ࿈ଓిྲྀΛ͖Ͱڅڙɺ͞Βʹ DDR-
SDRAM λʔϛωʔγϣϯʹٻΊΒΕΔ࠷େ 3A ͷมಈϐʔΫʹ΋
ରԠ͍ͯ͠·͕͢ɺ؏௨ిྲྀ͸ൃੜ͠·ͤΜɻ VSENSE ୺ࢠΛ
հͨ͠ిѹʹࢹ؂ΑΓ༏Εͨग़ྗෛՙϨΪϡϨʔγϣϯΛ࣮͢ݱ
Δͱͱ΋ʹɺνοϓηοτ΍ DDR DIMM ʹඞཁͳ VREF ిѹ΋ੜ
੒ͯ͠ग़ྗ͠·͢ɻ
͜ͷ΄͔ LP2996 ͸ɺSuspend-to-RAM (STR) ػೳΛαϙʔτ͢
ΔΞΫςΟϒ LOW ͷγϟοτμ΢ϯ (SD) ୺ࢠΛඋ͍͑ͯ·͢ɻSD
Λ LOW ʹ͢ΔͱɺVTT ग़ྗ͸ TRI-STATE ͷϋΠɾΠϯϐʔμϯ
εͱͳΓ·͕͢ɺVREF ͸ΞΫςΟϒΛอͪ·͢ɻຊϞʔυͰ͸଴ػ
࣌ফඅిྲྀ͕খ͘͞ͳΔͨΊɺిྗઅݮΛਤΕ·͢ɻ
ಛ௕
˙ ిྲྀιʔε͓ΑͼిྲྀγϯΫ
˙ ௿ग़ྗిѹΦϑηοτ
˙ ֎෇͚఍߅ෆཁ
˙ ϦχΞɾτϙϩδʔ
˙ Suspend-to-RAM (STR) ػೳ
˙ গͳ͍֎෇͚෦඼
˙ αʔϚϧɾγϟοτμ΢ϯ
˙ SO-8ɺPSOP-8ɺLLP-16 ύοέʔδͰڅڙ
ΞϓϦέʔγϣϯ
˙ DDR-Iͱ DDR-II λʔϛωʔγϣϯిѹʹରԠ
˙ SSTL-2ͱ SSTL-3 λʔϛωʔγϣϯ
˙ HSTL λʔϛωʔγϣϯ
୅දతͳΞϓϦέʔγϣϯճ࿏
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