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LMZ10505_1006 Datasheet, PDF (1/22 Pages) National Semiconductor (TI) – 5A SIMPLE SWITCHER® Power Module with 5.5V Maximum Input Voltage
LMZ10505
June 10, 2010
5A SIMPLE SWITCHER® Power Module with 5.5V Maximum
Input Voltage
Easy to Use 7 Pin Package
Performance Benefits
TO-PMOD 7 Pin Package
30107402
10.16 x 13.77 x 4.57 mm (0.4 x 0.39 x 0.18 in)
θJA = 20°C/W, θJC = 1.9°C/W (Note 3)
RoHS Compliant
■ Operates at high ambient temperatures
■ High efficiency up to 96% reduces system heat generation
■ Low radiated emissions (EMI) complies with EN55022
class B standard (Note 4)
■ Passes 10V/m radiated immunity EMI test standard
EN61000 4-3
■ Low output voltage ripple of 10 mV allows for powering
noise-sensitive transceiver and signaling ICs
■ Fast transient response for powering FPGAs and ASICs
System Performance
Current Derating (VOUT = 3.3V)
Electrical Specifications
■ 25W maximum total output power
■ Up to 5A output current
■ Input voltage range 2.95V to 5.5V
■ Output voltage range 0.8V to 5V
■ ±1.63% feedback voltage accuracy over temperature
■ Efficiency up to 96%
Key Features
■ Integrated shielded inductor
■ Flexible startup sequencing using external soft-start,
tracking, and precision enable
■ Protection against in-rush currents and faults such as input
UVLO and output short-circuit
■ -40°C to +125°C junction temperature operating range
■ Single exposed pad and standard pinout for easy
mounting and manufacturing
■ Pin-to-pin compatible with
LMZ10503 (3A/15W max)
LMZ10504 (4A/20W max)
■ Fully enable for WEBENCH® and Power Designer
Applications
■ Point-of-load conversions from 3.3V and 5V rails
■ Space constrained applications
■ Extreme temperatures/no air flow environments
■ Noise sensitive applications (i.e. transceiver, medical)
30107413
Efficiency (VOUT = 3.3V)
30107471
Radiated Emissions (EN 55022, Class B)
30107412
Note 1: θ JA measured on a 2.25” x 2.25” (5.8 cm x 5.8 cm) four layer board. Refer to PCB Layout Diagrams or Evaluation Board Application Note:
AN-2022.
Note 2: EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See Figure 5 and layout for information on device under test.
© 2010 National Semiconductor Corporation 301074
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