LMX3305 Datasheet, PDF (1/24 Pages) National Semiconductor (TI) – Triple Phase Locked Loop for RF Personal Communications

PRELIMINARY
August 2000
LMX3305
Triple Phase Locked Loop for RF Personal
Communications
General Description
The LMX3305 contains three Phase Locked Loops (PLL) on
a single chip. It has a RF PLL, an IF Rx PLL and an IF Tx
PLL for CDMA applications. The RF fractional-N PLL uses a
16/17/20/21 quadruple modulus prescaler for PCS applica-
tion and a 8/9/12/13 quadruple modulus prescaler for cellular
application. Both quadruple modulus prescalers offer
modulo 1 through 16 fractional compensation circuitry. The
RF fractional-N PLL can be programmed to operate from 800
MHz to 1400MHz in cellular band and 1200MHz to 2300
MHz in PCS band. The IF Rx PLL and the IF Tx PLL are
integer-N frequency synthesizers that operate from 45 MHz
to 600 MHz with 8/9 dual modulus prescalers. Serial data is
transferred into the LMX3305 via a microwire interface
(Clock, Data, & LE).
The RF PLL provides a fastlock feature allowing the loop
bandwidth to be increased by 3X during initial lock-on.
The supply voltage of the LMX3305 ranges from 2.7V to
3.6V. It typically consumes 9 mA of supply current and is
packaged in a 24-pin CSP package.
Features
n Three PLLs integrated on a single chip
n RF PLL fractional-N counter
n 16/17/20/21 RF quadruple modulus prescaler for PCS
application
n 8/9/12/13 RF quadruple modulus prescaler for cellular
application
n 2.7V to 3.6V operation
n Low current consumption: I_CC = 9 mA (typ) at 3.0V
n Programmable or logical power down mode: I_CC =
10 µA (typ) at 3.0V
n RF PLL Fastlock feature with timeout counter
n Digital lock detect
n Microwire Interface with data preset
n 24-pin CSP package
Applications
n CDMA Cellular telephone systems
Block Diagram
DS101361-1
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