LMX2541 Datasheet, PDF (1/40 Pages) National Semiconductor (TI) – Ultra-Low Noise PLLatinum Frequency Synthesizer with Integrated VCO

LMX2541
PRELIMINARY
July 2, 2009
Ultra-Low Noise PLLatinum Frequency Synthesizer with
Integrated VCO
General Description
The LMX2541 is an ultra low noise frequency synthesizer
which integrates a high performance delta-sigma fractional N
PLL, a VCO with fully integrated tank circuit, and an optional
frequency divider. The PLL offers an unprecedented normal-
ized noise floor of -225 dBc/Hz and can be operated with up
to 104 MHz of phase-detector rate (comparison frequency) in
both integer and fractional modes. The PLL can also be con-
figured to work with an external VCO.
The LMX2541 integrates several low-noise, high precision
LDOs and output driver matching network to provide higher
supply noise immunity and more consistent performance,
while reducing the number of external components. When
combined with a high quality reference oscillator, the
LMX2541 generates a very stable, ultra low noise signal.
The LMX2541 is offered in a family of 6 devices with varying
VCO frequency range from 1990 MHz up to 4 GHz. Using a
flexible divider, the LMX2541 can generate frequencies as
low as 31.6 MHz. The LMX2541 is a monolithic integrated
circuit, fabricated in a proprietary BiCMOS process. Device
programming is facilitated using a three-wire MICROWIRE
interface that can operate down to 1.8 volts. Supply voltage
ranges from 3.15 to 3.45 volts. The LMX2541 is available in
a 36 pin 6x6x0.8 mm Lead-Free Leadless Leadframe Pack-
age (LLP).
Device
LMX2541SQ2060E
LMX2541SQ2380E
LMX2541SQ2690E
LMX2541SQ3030E
LMX2541SQ3320E
LMX2541SQ3740E
VCO Frequency
1990 - 2240
2200 - 2530
2490 - 2865
2810 - 3230
3130 - 3600
3480 - 4000
Features
■ ^{Very Low RMS Noise and Spurs}
— -225 dBc/Hz Normalized PLL Phase Noise
— Integrated RMS Noise (100 Hz - 20 MHz)
■ ^{2 mrad (100 Hz - 20 MHz) at 2.1 GHz}
■ ^{3.5 mrad (100 Hz - 20 MHz) at 3.5 GHz}
■ ^{Ultra Low-Noise Integrated VCO}
■ ^{External VCO Option (Internal VCO Bypassed)}
■ ^{VCO Frequency Divider 1 to 63 (all values)}
■ ^{Programmable Output Power}
■ ^{Up to 104 MHz Phase Detector Frequency}
■ ^{Integrated Low-Noise LDOs}
■ ^{Programmable Charge Pump Output}
■ ^{Partially Integrated Loop Filter}
■ ^{Digital Frequency Shift Keying (FSK) Modulation Pin}
■ ^{Integrated Reference Crystal Oscillator Circuit}
■ ^{Hardware and Software Power Down}
■ ^{FastLock Mode with Cycle Slip Reduction}
■ ^{Analog and Digital Lock Detect}
■ ^{1.6 V Logic Compatibility}
Target Applications
■ ^{Wireless Infrastructure (UMTS, LTE, WiMax)}
■ ^{Broadband Wireless}
■ ^{Wireless Meter Reading}
■ ^{Test and Measurement}
System Diagram
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