LMX2522 Datasheet, PDF (1/18 Pages) National Semiconductor (TI) – PLLatinum Frequency Synthesizer System with Integrated VCOs

June 2003
LMX2522/LMX2532
PLLatinum^™ Frequency Synthesizer System with
Integrated VCOs
General Description
LMX2522 and LMX2532 are highly integrated, high perfor-
mance, low power frequency synthesizer systems optimized
for Korean PCS (K-PCS) with GPS and Korean Cellular
(K-Cellular) with GPS, CDMA (1xRTT, IS-95) mobile hand-
sets. Using a proprietary digital phase locked loop tech-
nique, LMX2522 and LMX2532 generate very stable, low
noise local oscillator signals for up and down conversion in
wireless communications devices.
LMX2522 and LMX2532 include a RF voltage controlled
oscillator (VCO), a GPS VCO, a loop filter, and a fractional-N
RF PLL based on a delta sigma modulator. In concert these
blocks form a closed loop RF and GPS synthesizer system.
LMX2522 supports the Korean PCS band with GPS and
LMX2532 supports the Korean Cellular band with GPS.
LMX2522 and LMX2532 include an Integer-N IF PLL also.
For more flexible loop filter designs, the IF PLL includes a
4-level programmable charge pump. Together with an exter-
nal VCO and loop filter, LMX2522 and LMX2532 make a
complete closed loop IF synthesizer system.
Serial data is transferred to the device via a three-wire
MICROWIRE interface (DATA, LE, CLK).
Operating supply voltage ranges from 2.7 V to 3.3 V.
LMX2502 and LMX2512 feature low current consumption:
17 mA at 2.8 V.
LMX2522 and LMX2532 are available in a 28-pin leadless
leadframe package (LLP).
Features
n Small Size
Small 5.0 mm x 5.0 mm x 0.75 mm 28-Pin LLP Package
n RF/GPS Synthesizer System
Integrated RF VCO
Integrated GPS VCO
Integrated Loop Filter
Low Spurious, Low Phase Noise Fractional-N RF PLL
Based on 11-bit Delta Sigma Modulator
10 kHz Frequency Resolution
n IF Synthesizer System
Integer-N IF PLL
Programmable Charge Pump Current Levels
Programmable Frequencies
n Supports Various Reference Oscillator Frequencies
19.20/19.68 MHz
n Fast Lock Time: 500 µs
n Low Current Consumption
17 mA at 2.8 V
n 2.7 V to 3.3 V Operation
n Digital Filtered Lock Detect Output
n Hardware and Software Power Down Control
Applications
n Korean PCS CDMA Systems with GPS
n Korean Cellular CDMA Systems with GPS
Functional Block Diagram
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© 2003 National Semiconductor Corporation DS200672
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