LMX2485_08 Datasheet, PDF (1/40 Pages) National Semiconductor (TI) – 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum™ Frequency Synthesizers with 800MHz Integer PLL

February 27, 2008
LMX2485/LMX2485E
50 MHz - 3.0 GHz High Performance Delta-Sigma Low
Power Dual PLLatinum™ Frequency Synthesizers with 800
MHz Integer PLL
General Description
The LMX2485 is a low power, high performance delta-sigma
fractional-N PLL with an auxiliary integer-N PLL. The device
is fabricated using National Semiconductor’s advanced pro-
cess.
With delta-sigma architecture, fractional spurs at lower offset
frequencies are pushed to higher frequencies outside the loop
bandwidth. The ability to push close in spur and phase noise
energy to higher frequencies is a direct function of the mod-
ulator order. Unlike analog compensation, the digital feed-
back technique used in the LMX2485 is highly resistant to
changes in temperature and variations in wafer processing.
The LMX2485 delta-sigma modulator is programmable up to
fourth order, which allows the designer to select the optimum
modulator order to fit the phase noise, spur, and lock time
requirements of the system.
Serial data for programming the LMX2485 is transferred via
a three line high speed (20 MHz) MICROWIRE interface. The
LMX2485 offers fine frequency resolution, low spurs, fast pro-
gramming speed, and a single word write to change the
frequency. This makes it ideal for direct digital modulation
applications, where the N counter is directly modulated with
information. The LMX2485 is available in a 24 lead
4.0 X 4.0 X 0.8 mm LLP package.
Applications
■ ^{Cellular phones and base stations}
CDMA, WCDMA, GSM/GPRS, TDMA, EDGE, PDC
■ ^{Direct digital modulation applications}
■ ^{Satellite and cable TV tuners}
■ ^{WLAN Standards}
Features
Quadruple Modulus Prescalers for Lower Divide Ratios
■ ^{RF PLL: 8/9/12/13 or 16/17/20/21}
■ ^{IF PLL: 8/9 or 16/17}
Advanced Delta Sigma Fractional Compensation
■ ^{12 bit or 22 bit selectable fractional modulus}
■ ^{Up to 4th order programmable delta-sigma modulator}
Features for Improved Lock Times and Programming
■ ^{Fastlock / Cycle slip reduction}
■ ^{Integrated time-out counter}
■ ^{Single word write to change frequencies with Fastlock}
Wide Operating Range
■ ^{LMX2485 RF PLL: 500 MHz to 3.0 GHz}
■ ^{LMX2485E RF PLL: 50 MHz to 3.0 GHz}
Useful Features
■ ^{Digital lock detect output}
■ ^{Hardware and software power-down control}
■ ^{On-chip crystal reference frequency doubler.}
■ ^{RF phase comparison frequency up to 50 MHz}
■ ^{2.5 to 3.6 volt operation with I}_CC ^{= 5.0 mA at 3.0 V}
Functional Block Diagram
PLLatinum™ is a trademark of National Semiconductor Corporation.
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