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LMX2354 Datasheet, PDF (1/23 Pages) National Semiconductor (TI) – PLLatinum Fractional N RF/ Integer N IF Dual Low Power Frequency Synthesizer
August 2001
LMX2354
PLLatinum Fractional N RF/ Integer N IF Dual Low Power
Frequency Synthesizer
LMX2354 2.5 GHz/550 MHz
General Description
The LMX2354 is part of a family of monolithic integrated
fractional N/Integer N frequency synthesizers designed to be
used in a local oscillator subsystem for a radio transceiver. It
is fabricated using National’s 0.5 µ ABiC V silicon BiCMOS
process. The LMX2354 contains quadruple modulus pres-
calers along with modulo 15 or 16 fractional compensation
circuitry in the RF divider. The LMX2354 provides a continu-
ous divide ratio of 80 to 32767 in 16/17/20/21
(1.2 GHz–2.5 GHz) fractional mode and 40 to 16383 in
8/9/12/13 (550 MHz–1.2 GHz) fractional mode. The IF cir-
cuitry for the LMX2354 contains an 8/9 prescaler, and is fully
programmable. Using a fractional N phase locked loop tech-
nique, the LMX2354 can generate very stable low noise
control signals for UHF and VHF voltage controlled oscilla-
tors (VCOs).
For the RF PLL, a highly flexible 16 level programmable
charge pump supplies output current magnitudes from 100
µA to 1.6 mA. Two uncommitted CMOS outputs can be used
to provide external control signals, or configured to FastLock
mode. Serial data is transferred into the LMX2354 via a three
wire interface (Data, LE, Clock). Supply voltage can range
from 2.7V to 5.5V. The LMX2354 family features very low
current consumption; typically LMX2354 (2.5 GHz) — 7.0
mA. The LMX2354 are available in a 24-pin TSSOP surface
mount plastic package and 24-pin CSP.
Features
n Pin compatible/functional equivalent to the LMX2350
n Enhanced Low Noise Fractional Engine
n 2.7V to 5.5V operation
n Low current consumption
LMX2354: ICC = 7 mA typical at 3V
n Programmable or logical power down mode:
ICC = 5 µA typical at 3V
n Modulo 15 or 16 fractional RF N divider supports ratios
of 1, 2, 3, 4, 5, 8, 15, or 16
n Programmable charge pump current levels
RF 100 µA to 1.6 mA in 100 µA steps
IF 100 µA or 800 µA
n Digital filtered lock detect
n Available in 24-pin TSSOP and 24-pin CSP
Applications
n Portable wireless communications (PCS/PCN, cordless)
n Dual mode cellular telephone systems
n Zero blind slot TDMA systems
n Spread spectrum communication systems (CDMA)
n Cable TV Tuners (CATV)
Functional Block Diagram
© 2001 National Semiconductor Corporation DS200048
20004801
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