LMP8100 Datasheet, PDF (1/30 Pages) National Semiconductor (TI) – Programmable Gain Amplifier

July 2007
LMP8100
Programmable Gain Amplifier
General Description
The LMP8100 programmable gain amplifier features an ad-
justable gain from 1 to 16 V/V in 1 V/V increments. At the core
of the LMP8100 is a precision, 33 MHz, CMOS input, rail-to-
rail input/output operational amplifier with a typical open-loop
gain of 110 dB. Amplifier closed-loop gain is set by an array
of precision thin-film resistors. Amplifier control modes are
programmed via a serial port that allows devices to be cas-
caded so that an array of LMP8100 amplifiers can be pro-
grammed by a single serial data stream. The control mode
registers are double buffered to insure glitch-free transitions
between programmed settings. The LMP8100 is part of the
LMP^® precision amplifier family and is ideal for a variety of
applications.
The amplifier features several programmable controls includ-
ing: gain; a power-conserving shutdown mode which can
reduce current consumption to only 20 μA; an input zeroing
switch which allows the output offset voltage to be measured
to facilitate system calibration; and four levels of internal fre-
quency compensation which can be set to maximize band-
width at the different gain settings.
The LMP8100 comes in a 14-Pin SOIC package.
Features
Typical Values, T_A = 25°C
■ ^{Gain error (over temperature range)}
— LMP8100A
0.03%
— LMP8100
0.075%
■ ^{Gain range}
1 to 16 V/V in 1 V/V steps
■ ^{Programmable frequency compensation}
■ ^{Input zero calibration switch}
■ ^{Input offset voltage (max, LMP8100A)}
250 μV
■ ^{Input bias current}
■ ^{Input noise voltage}
0.1 pA
12 nV/√Hz
■ ^{Unity gain bandwidth}
33 MHz
■ ^{Slew rate}
12 V/μs
■ ^{Output current}
20 mA
■ ^{Supply voltage range}
2.7V to 5.5V
■ ^{Supply current}
5.3 mA
■ ^{Rail-to-Rail output swing}
V⁺ −50 mV to V^− +50 mV
Applications
■ ^{Industrial instrumentation}
■ ^{Data acquisition systems}
■ ^{Test equipment}
■ ^{Scaling amplifier}
■ ^{Gain control}
■ ^{Sensor interface}
Simplified Block Diagram
LMP^® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation 201476
20147607
www.national.com