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LM5046_1 Datasheet, PDF (1/14 Pages) National Semiconductor (TI) – Input operating range: 36V to 75V Line UVLO (34V/32V on/off)
LM5046 Evaluation Board
National Semiconductor
Application Note 2115
Ajay Hari
February 23, 2011
Introduction
The LM5046 evaluation board is designed to provide the de-
sign engineer with a fully functional power converter based
on the phase-shifted full-bridge topology to evaluate the
LM5046 PWM controller. The evaluation board is provided in
an industry standard quarter brick footprint.
The performance of the evaluation board is as follows:
• Input operating range: 36V to 75V
• Output voltage: 3.3V
• Measured efficiency at 48V: 92% @ 30A
• Frequency of operation: 420kHz
• Board size: 2.28 x 1.45 x 0.5 inches
• Load Regulation: 0.2%
• Line Regulation: 0.1%
• Line UVLO (34V/32V on/off)
• Hiccup Mode Current Limit
The printed circuit board consists of 6 layers; 2 ounce copper
outer layers and 3 ounce copper inner layers on FR4 material
with a total thickness of 0.062 inches. The unit is designed for
continuous operation at rated load at <40°C and a minimum
airflow of 200 CFM.
Theory of Operation
The Phase-Shifted Full-Bridge (PSFB) topology is a deriva-
tive of the classic full-bridge topology. When tuned appropri-
ately the PSFB topology achieves zero voltage switching
(ZVS) of the primary FETs while maintaining constant switch-
ing frequency. The ZVS feature is highly desirable as it re-
duces both the switching losses and EMI emissions. Figure 1
illustrates the circuit arrangement for the PSFB topology. The
power transfer mode of the PSFB topology is similar to the
hard switching full-bridge i.e., when the FETs in the diagonal
of the bridge are turned-on (Q1 & Q3 or Q2 & Q4), it initiates
a power transfer cycle. At the end of the power transfer cycle,
PWM turns off the switch Q3 or Q4 depending on the phase
with a pulse width determined by the input and output voltages
and the transformer turns ratio. In the freewheel mode, unlike
the classic full-bridge where all the four primary FETs are off,
in the PSFB topology the primary of the power transformer is
shorted by activating either both the top FETs (Q1 and Q4) or
both the bottom FETs (Q2 and Q3) alternatively. In a PSFB
topology, the primary switches are turned on alternatively en-
ergizing the windings in such a way that the flux swings back
and forth in the first and the third quadrants of the B-H curve.
The use of two quadrants allows better utilization of the core
resulting in a smaller core volume compared to the single-
ended topologies. Further, the ZVS of the primary FETs re-
sults in low EMI compared to the conventional hard-switching
full-bridge topology.
Simplified Full-Bridge Converter
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