FPD87346 Datasheet, PDF (1/3 Pages) National Semiconductor (TI) – Low EMI, Low Dynamic Power (SVGA) XGA/WXGA TFT-LCD Timing Controller with Reduced Swing Differential Signaling (RSDS™) Outputs

PRELIMINARY
October 2003
FPD87346
Low EMI, Low Dynamic Power (SVGA) XGA/WXGA
TFT-LCD Timing Controller with Reduced Swing
Differential Signaling (RSDS^™) Outputs
General Description
The FPD87346 is a timing controller that combines an LVDS
single pixel input interface with National’s Reduced Swing
Differential Signaling (RSDS™) output driver interface for
(SVGA) XGA and Wide XGA resolutions. It resides on the
TFT-LCD panel and provides the data buffering and control
signal generation for (SVGA) XGA, and Wide XGA graphic
modes. The RSDS™ path to the column driver contributes
toward lowering radiated EMI and reducing system dynamic
power consumption.
This single RSDS™ bus conveys the 8-bit color data for
(SVGA) XGA, and Wide XGA panels at 170 Mb/s when using
VESA 60 Hz standard timing.
Features
n Reduced Swing Differential Signalling (RSDS™) digital
bus reduces dynamic power, EMI and bus width from
the timing controller
n LVDS single pixel input interface system
n Input clock range from 40 MHz to 85 MHz
n Drives RSDS™ Column Drivers at 170 Mb/s with an
85 MHz clock (Max.)
n Virtual 8 bit color depth in FRC/Dithering mode
n Single narrow 9-bit differential Source Driver bus
minimizes width of Source PCB
n Ability to drive (SVGA) XGA and Wide XGA TFT-LCD
Systems
n Failure detect function in DE mode
n CMOS circuitry operates from a 3.0V–3.6V supply
System Diagram
FIGURE 1. Block Diagram of the LCD Module
RSDS™ is a trademark of National Semiconductor Corporation
© 2003 National Semiconductor Corporation DS200615
20061501
www.national.com