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DS96176 Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – RS-485/RS-422 Differential Bus Transceiver
May 1998
DS96176
RS-485/RS-422 Differential Bus Transceiver
General Description
The DS96176 Differential Bus Transceiver is a monolithic in-
tegrated circuit designed for bidirectional data communica-
tion on balanced multipoint bus transmission lines. The
transceiver meets EIA Standard RS-485 as well as
RS-422A.
The DS96176 combines a TRI-STATE® differential line driver
and a differential input line receiver, both of which operate
from a single 5.0V power supply. The driver and receiver
have an active Enable that can be externally connected to
function as a direction control. The driver differential outputs
and the receiver differential inputs are internally connected
to form differential input/output (I/O) bus ports that are de-
signed to offer minimum loading to the bus whenever the
driver is disabled or when VCC = 0V. These ports feature
wide positive and negative common mode voltage ranges,
making the device suitable for multipoint applications in
noisy environments.
The driver is designed to handle loads up to 60 mA of sink or
source current. The driver features positive and negative
current-limiting and thermal shutdown for protection from line
fault conditions. Thermal shutdown is designed to occur at
junction temperature of approximately 160˚C. The receiver
features a typical input impedance of 15 kΩ, an input sensi-
tivity of ±200 mV, and a typical input hysteresis of 50 mV.
The DS96176 can be used in transmission line applications
employing the DS96172 and the DS96174 quad differential
line drivers and the DS96173 and DS96175 quad differential
line receivers.
Features
n Bidirectional transceiver
n Meets EIA Standard RS-422A and RS-485
n Designed for multipoint transmission
n TRI-STATE driver and receiver enables
n Individual driver and receiver enables
n Wide positive and negative input/output bus voltage
ranges
n Driver output capability ±60 mA Maximum
n Thermal shutdown protection
n Driver positive and Negative current-limiting
n High impedance receiver input
n Receiver input sensitivity of ±200 mV
n Receiver input hysteresis of 50 mV typical
n Operates from single 5.0V supply
n Low power requirements
Connection Diagram
8–Lead DIP
DS009630-1
Top View
Order Number DS96176CN
See NS Package Number N08E
Function Table
Receiver
Differential Inputs
A-B
VID ≥ 0.2V
VID ≤ −0.2V
X
H = High Level
L = Low Level
X = Immaterial
Z = High Impedance (off)
Enable
RE
L
L
H
Output
R
H
L
Z
Driver
Input
DI
H
L
X
Enable
DE
H
H
L
Outputs
A
B
H
L
L
H
Z
Z
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS009630
www.national.com