DS91D176 Datasheet, PDF (1/13 Pages) National Semiconductor (TI) – Multipoint-LVDS (M-LVDS) Transceivers

April 2006
DS91D176/DS91C176
Multipoint-LVDS (M-LVDS) Transceivers
General Description
The DS91C176 and DS91D176 are high-speed M-LVDS
differential transceivers designed for multipoint applications
with multiple drivers or receivers. Multipoint LVDS (M-LVDS)
is a new bus interface standard (TIA/EIA-899) based on
LVDS but including several enhancements to improve multi-
point performance. M-LVDS devices have superior drive
capability and can support up to 32 loads. Along with in-
creased drive, M-LVDS devices are required to have a con-
trolled edge rate to minimize reflections and EMI. The 1
nSec minimum edge rate is tolerant of stub lengths up to 2
inches in length. M-LVDS devices also have a very large
common mode range for additional noise margin in heavily
loaded and noisy backplane environments.
The DS91C176/DS91D176 are half-duplex transceivers that
accept LVTTL/LVCMOS signals at the driver inputs and con-
vert them to differential M-LVDS signal levels. The receiver
inputs accept low voltage differential signals (LVDS,
B-LVDS, M-LVDS, LV-PECL) and convert them to 3V LVC-
MOS signals. The DS91C176 receiver contains an M-LVDS
type 2 failsafe circuit with an internal 100 mV offset that
provides a LOW output for both short and open input condi-
tions.
Features
n Meets TIA/EIA-899 M-LVDS Standard
n Capable of driving 32 LVDS loads
n Controlled Edge Rates Tolerant to Stubs
n Wide Common Mode for Increased Noise Immunity
n DS91C176 has type 2 Fail-safe support
n Up to 200 Mbps operation
n Industrial temperature range
n Single 3.3V supply
n 8-lead SOIC package
Typical Application in AdvancedTCA Clock Distribution
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