DS90LV031B Datasheet, PDF (1/10 Pages) National Semiconductor (TI) – 3V LVDS Quad CMOS Differential Line Driver

January 2000
DS90LV031B
3V LVDS Quad CMOS Differential Line Driver
General Description
The DS90LV031B is a quad CMOS differential line driver de-
signed for applications requiring ultra low power dissipation
and high data rates. The device is designed to support data
rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage
Differential Signaling (LVDS) technology.
The DS90LV031B accepts low voltage TTL/CMOS input lev-
els and translates them to low voltage (350 mV) differential
output signals. In addition the driver supports a TRI-STATE^®
function that may be used to disable the output stage, dis-
abling the load current, and thus dropping the device to an
ultra low idle power state of 13 mW typical. The
DS90LV031B is enhanced over the DS90LV031A in that the
inputs are further ruggedized for excessive undershoot.
The EN and EN* inputs allow active Low or active High con-
trol of the TRI-STATE outputs. The enables are common to
all four drivers. The DS90LV031B and companion line re-
ceiver (DS90LV032A) provide a new alternative to high
power pseudo-ECL devices for high speed point-to-point in-
terface applications.
Features
n >400 Mbps (200 MHz) switching rates
n 0.1 ns typical differential skew
n 0.4 ns maximum differential skew
n 2.0 ns maximum propagation delay
n Ruggedized inputs that can withstand excessive
undershoot
n 3.3V power supply design
n ±350 mV differential signaling
n Low power dissipation (13mW at 3.3V static)
n Interoperable with existing 5V LVDS devices
n Compatible with IEEE 1596.3 SCI LVDS standard
n Compatible with TIA/EIA-644 LVDS standard
n Industrial temperature operating range
n Available in SOIC and TSSOP surface mount packaging
Connection Diagram
Dual-In-Line
Functional Diagram
DS101311-1
Order Number DS90LV031BTM
or DS90LV031BTMTC
See NS Package Number M16A or MTC16
Truth Table
DRIVER
Enables
EN
EN*
L
H
All other combinations of
ENABLE inputs
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation DS101311
Input
D_IN
X
L
Outputs
D_OUT+
Z
D_OUT−
Z
L
H
H
H
L
DS101311-2
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