DS90C031B Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – LVDS Quad CMOS Differential Line Driver

March 1999
DS90C031B
LVDS Quad CMOS Differential Line Driver
General Description
The DS90C031B is a quad CMOS differential line driver de-
signed for applications requiring ultra low power dissipation
and high data rates. The device is designed to support data
rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Volt-
age Differential Signaling (LVDS) technology.
The DS90C031B accepts TTL/CMOS input levels and trans-
lates them to low voltage (350 mV) differential output sig-
nals. In addition the driver supports a TRI-STATE^® function
that may be used to disable the output stage, disabling the
load current, and thus dropping the device to an ultra low idle
power state of 11 mW typical.
In addition, the DS90C031B provides power-off high imped-
ance LVDS outputs. This feature assures minimal loading ef-
fect on the LVDS bus lines when V_CC is not present.
The DS90C031B and companion line receiver (DS90C032B)
provide a new alternative to high power pseudo-ECL devices
for high speed point-to-point interface applications.
Features
n >155.5 Mbps (77.7 MHz) switching rates
n High impedance LVDS outputs with power-off
n ±350 mV differential signaling
n Ultra low power dissipation
n 400 ps maximum differential skew (5V, 25˚C)
n 3.5 ns maximum propagation delay
n Industrial operating temperature range
n Pin compatible with DS26C31, MB571 (PECL) and
41LG (PECL)
n Conforms to ANSI/TIA/EIA-644 LVDS standard
n Offered in narrow and wide body SOIC package
n Fail-safe logic for floating inputs
Connection Diagram
Dual-In-Line
Functional Diagram
DS100989-1
Order Number
DS90C031BTM,
or DS90C031BTWM
See NS Package Number
M16A or M16B
Driver Truth Table
Enables
EN
EN*
L
H
All other combinations
of ENABLE inputs
DS100989-2
Input
D_IN
X
L
H
Outputs
D_OUT+
Z
D_OUT−
Z
L
H
H
L
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS100989
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