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DS80EP100 Datasheet, PDF (1/14 Pages) National Semiconductor (TI) – 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables | |||
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July 2007
DS80EP100
5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and
Cables
General Description
Nationalâs Power-saver equalizer compensates for transmis-
sion medium losses and minimizes medium-induced deter-
ministic jitter. Performance is guaranteed over the full range
of 5 to 12.5 Gbps. The DS80EP100 requires no power to op-
erate. The equalizer operates anywhere in the data path to
minimize media-induced deterministic jitter in both FR4 traces
and cable applications. Symmetric I/O structures support full
duplex or half duplex applications. Linear compensation is
provided independent of line coding or protocol. The device
is ideal for both bi-level and multi-level signaling.
The equalizer is available in a 6 pin leadless LLP package
with a space saving 2.2 mm X 2.5 mm footprint. This tiny
package provides maximum flexibility in placement and rout-
ing of the Power-saver equalizer.
Features
â 5 to 12.5 Gbps Operation
â No Power or Ground Required
â Equalization effective anywhere in data path
â Equalizes CML, LV-PECL, LVDS signals
â Symmetric I/O structures provide equal boost for bi-
directional operation
â 7 dB Maximum Boost
â Code independent, 8b/10b or Scrambled
â Supports both bi-level and multi-level signaling
â Extends reach over backplanes and cables
â Compatible with PCI-Express Gen1 and Gen2
â Compatible with XAUI
â Will operate in series with existing active Equalizer
â Easy to handle 6 pin LLP
Simplified Application Diagram
30029401
Note: The DS80EP100 provides the flexibility of passing the data from either side of the device. It can be placed anywhere in the data path.
© 2007 National Semiconductor Corporation 300294
www.national.com
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